| On the 0/1 test for chaos in continuous systems M Melosik, W Marszalek Bulletin of the Polish Academy of Sciences: Technical Sciences, 2016 | 30 | 2016 |
| SI-Studio, a layout generator of current mode circuits A Handkiewicz, S Szcze, M Naumowicz, P Katarzyński, M Melosik, ... Expert Systems with Applications 42 (6), 3205-3218, 2015 | 21 | 2015 |
| Design automation of a lossless multiport network and its application to image filtering A Handkiewicz, P Katarzyński, S Szcze, M Naumowicz, M Melosik, ... Expert systems with applications 41 (5), 2211-2221, 2014 | 14 | 2014 |
| Using the 0‐1 test for chaos to detect hardware trojans in chaotic bit generators M Melosik, W Marszalek Electronics Letters 52 (11), 919-921, 2016 | 12 | 2016 |
| Automation of CMOS technology migration illustrated by RGB to YCrCb analogue converter M Naumowicz, M Melosik, P Katarzynski, A Handkiewicz Opto-Electronics Review 21 (3), 326-331, 2013 | 11 | 2013 |
| Analogue CMOS ASICs in image processing systems W Jendernalik, G Blakiewicz, A Handkiewicz, M Melosik Metrology and Measurement Systems 20 (4), 613--622, 2013 | 11 | 2013 |
| VHDL‐AMS in switched‐current analog filter pair design based on a gyrator‐capacitor prototype circuit A Handkiewicz, P Katarzyński, S Szczęsny, M Naumowicz, M Melosik, ... International Journal of Numerical Modelling: Electronic Networks, Devices …, 2014 | 10 | 2014 |
| gC-Studio – the environment for automated filter design P Katarzyński, M Melosik, A Handkiewicz BULLETIN OF THE POLISH ACADEMY OF SCIENCES TECHNICAL SCIENCES 61, 2013 | 10 | 2013 |
| Technology Migration of Analogue CMOS Circuits Using Hooke-Jeeves Algorithm and Genetic Algorithms in Multi-Core CPU Systems M Naumowicz, M Melosik, P Katarzyński MIXDES 2013, 2013 | 9 | 2013 |
| Trojan attack on the initialization of pseudo-random bit generators using synchronization of chaotic input sources M Melosik, W Marszalek IEEE Access 9, 161846-161853, 2021 | 6 | 2021 |
| Symbolic analysis in gyrator-capacitor filters P Katarzynski, M Melosik, M Naumowicz, S Szczesny Proceedings of the 19th International Conference Mixed Design of Integrated …, 2012 | 5 | 2012 |
| Design of elliptic filters with phase correction by using genetic algorithm P Katarzyński, A Handkiewicz, S Szczęsny, M Melosik, M Naumowicz Przeglad Elektrotechniczny 86, 69-73, 2010 | 5 | 2010 |
| Design of elliptic filters with phase correction by using genetic algorithm P Katarzynski, A Handkiewicz, S Szczesny, M Melosik, M Naumowicz 2009 MIXDES-16th International Conference Mixed Design of Integrated …, 2009 | 5 | 2009 |
| A hybrid chaos-based pseudo-random bit generator in VHDL-AMS M Melosik, W Marszalek 2014 IEEE 57th International Midwest Symposium on Circuits and Systems …, 2014 | 4 | 2014 |
| Automated Design of Switched Current Sigma-Delta Modulator with a New Comparator Structure P Śniatała, A Handkiewicz, P Katarzyński, S Szczęsny, ... MIXDES 2013, 2013 | 4 | 2013 |
| Hardware Trojans detection in chaos-based cryptography M Melosik, P Sniatala, W Marszalek Bulletin of the Polish Academy of Sciences Technical Sciences, 725-732-725-732, 2017 | 3 | 2017 |
| Automated DCT layout generation using AMPLE language A Handkiewicz, P Sniatala, G Palaszynski, S Szczesny, P Katarzynski, ... Proceedings of the 17th International Conference Mixed Design of Integrated …, 2010 | 3 | 2010 |
| Remote Prototyping of FPGA-Based Devices in the IoT Concept during the COVID-19 Pandemic M Melosik, M Naumowicz, M Kropidłowski, W Marszalek Electronics 11 (9), 1497, 2022 | 2 | 2022 |
| Strengthening quality of chaotic bit sequences M Melosik, W Marszalek Electronics 11 (2), 272, 2022 | 2 | 2022 |
| FPAA accelerator for machine vision systems S Szczęsny, A HANDKIEWICZ, M NAUMOWICZ, M MELOSIK Przegląd Elektrotechniczny, ISSN, 0033-2097, 2015 | 2 | 2015 |
Mariusz NaumowiczPoznan University of Technology, Department of Computer ScienceZweryfikowany adres z put.poznan.pl
