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Andrzej Mazurak
Andrzej Mazurak
Warsaw University of Technology, Institute of Microelectronics and Optoelectronics
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Investigation of Electrical Properties of the Al/SiO2/n++-Si Resistive Switching Structures by Means of Static, Admittance, and Impedance Spectroscopy …
P Wiśniewski, J Jasiński, A Mazurak, B Stonio, B Majkusiak
Materials 14 (20), 6042, 2021
102021
Technology and characterization of MIS structures with co-doped silicon nanocrystals (Si-NCs) embedded in hafnium oxide (HfOx) ultra-thin layers
A Mazurak, R Mroczyński, J Jasiński, D Tanous, B Majkusiak, S Kano, ...
Microelectronic Engineering 178, 298-303, 2017
102017
Silicon-Carbide (SiC) nanocrystal technology and characterization and its applications in memory structures
A Mazurak, R Mroczyński, D Beke, A Gali
Nanomaterials 10 (12), 2387, 2020
82020
Small-signal admittance model of multi-traps distributed over energy and space in the insulator of MIS tunnel structures
J Jasiński, A Mazurak, R Mroczyński, B Majkusiak
Microelectronic Engineering 147, 349-353, 2015
62015
Effect of nanocrystal geometric location on tunnel currents and small‐signal admittance of MIS structures
A Mazurak, J Jasiński, B Majkusiak
physica status solidi (c) 13 (10‐12), 1035-1039, 2016
52016
Investigation of the Temperature Effect on Electrical Characteristics of Al/SiO2/n++-Si RRAM Devices
P Wiśniewski, M Nieborek, A Mazurak, J Jasiński
Micromachines 13 (10), 1641, 2022
42022
Investigation of double barrier MOS tunnel diodes with PECVD silicon quantum well
B Majkusiak, RB Beck, A Mazurak, J Grabowski
Microelectronics Reliability 51 (7), 1172-1177, 2011
42011
Comparison of memory effect with voltage or current charging pulse bias in MIS structures based on codoped Si-NCs embedded in SiO2 or HfOx
A Mazurak, R Mroczyński
Solid-State Electronics 159, 157-164, 2019
32019
Charging/discharging processes in nanocrystaline MOS structures-Theoretical study
D Tanous, A Mazurak, B Majkusiak
Journal of Physics: Conference Series 709 (1), 012012, 2016
32016
Study of the effect of tunneling through the traps inside the insulator on small-signal admittance of the MOS structure
J Jasiński, A Mazurak, B Majkusiak
Microelectronic engineering 109, 1-4, 2013
32013
WKB approximation based formula for tunneling probability through a multi-layer potential barrier
A Mazurak, B Majkusiak
2012 15th International Workshop on Computational Electronics, 1-3, 2012
32012
Some Issues of Modeling the Double Barrier Metal-Oxide-Semiconductor Tunnel Structures
B Majkusiak, A Mazurak
Advanced Materials Research 276, 77-85, 2011
32011
Modeling of tunneling through a three-layer gate stack with/without a quantum well
A Mazurak, J Walczak, B Majkusiak
Journal of Vacuum Science & Technology B 29 (2), 2011
32011
Conductance modulation in Al/SiO2/n-Si MIS resistive switching structures
P Wiśniewski, J Jasiński, A Mazurak
2021 Joint International EUROSOI Workshop and International Conference on …, 2021
22021
Determination of border/bulk traps parameters based on (CGV) admittance measurements
A Mazurak, B Majkusiak
Journal of Vacuum Science & Technology B 37 (3), 2019
22019
Stress‐and‐Sense Investigation of Memory Effect in Si‐NCs MIS Structures
A Mazurak, J Jasiński, R Mroczyński
physica status solidi (b) 255 (10), 1700634, 2018
22018
Simulations of transient processes and characteristics of the nc-MOS structures
D Tanous, A Mazurak, B Majkusiak
Microelectronic Engineering 178, 173-177, 2017
22017
Impact of nanocrystal (s) location on CVt and IVt characteristics of ncMOS structures
D Tanous, A Mazurak, B Majkusiak
Electron Technology Conference 2016 10175, 110-117, 2016
22016
Examination of physical structure of experimental double barrier MOS tunnel diode by comparison with theoretical models
AI Mazurak, B Majkusiak, J Grabowski, RB Beck
6th Workshop of the Thematic Network on Silicon-on-Insulator Technology …, 2010
22010
Investigation of the anomalous effect of the AC-signal frequency on flat-band voltage of Al/HfO2/SiO2/Si structures
A Mazurak, B Majkusiak
Solid-State Electronics 183, 108107, 2021
12021
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Articles 1–20