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Swarnil Roy
Swarnil Roy
Jadavpur University
Verified email at msit.edu.in
Title
Cited by
Cited by
Year
Analysis of sub-threshold adiabatic logic model using junctionless MOSFET for low power application
S Roy, G Jana, M Chanda
Silicon 14 (3), 903-911, 2022
152022
Effect of back oxide thickness of FDSOI on SRAM performance
S Roy, S Mukherjee, A Dutta, CK Sarkar
Superlattices and Microstructures 98, 316-324, 2016
92016
Highly efficient PWM synchronous buck converter with optimized LDMOS
S Roy, S Mukherjee, CK Sarkar
Superlattices and Microstructures 83, 595-603, 2015
82015
Design and study of programmable ring oscillator using IDUDGMOSFET
S Mukherjee, S Roy, K Koley, A Dutta, CK Sarkar
Solid-State Electronics 117, 193-198, 2016
72016
Study on effect of back oxide thickness variation in FDSOI MOSFET on analogue circuit performance
S Mukherjee, S Roy, A Dutta, CK Sarkar
IET Circuits, Devices & Systems 10 (6), 497-503, 2016
62016
Impact of lateral straggle on analog and digital circuit performance using independently driven underlap DG-MOSFET
S Mukherjee, A Dutta, S Roy, K Koley, CK Sarkar
Microelectronics Journal 46 (11), 1082-1090, 2015
62015
Power and Delay Analysis of Junction-Less Double Gate CMOS Inverter in Near and Sub-Threshold Regime
D Sen, B Banik, S Roy
2018 IEEE Electron Devices Kolkata Conference (EDKCON), 367-372, 2018
52018
New technologies in vegetable production
YS Reddy, S Roy, SK Tiwari
Kurukshetra A Journal on Rural Development 62 (8), 20-23, 2014
52014
Ameliorative effect of DL-methionine supplementation in chronic arsenic toxicity in goats.
M Roy, PK Pandey, S Roy
Indian Veterinary Journal 86 (6), 570-572, 2009
52009
Implementation of low power programmable flash ADC Using IDUDGMOSFET
S Mukherjee, A Dutta, S Roy, CK Sarkar
IEEE Transactions on Circuits and Systems II: Express Briefs 65 (7), 844-848, 2017
42017
Verilog-A Modeling of Junction-less MOSFET in Sub-Threshold Regime for Ultra Low-Power Application
M Sen, A Gatait, S Ghosh, M Chanda, S Roy, P Debnath
2019 Women Institute of Technology Conference on Electrical and Computer …, 2019
32019
A 30 W 800 MHz complimentary LDMOS power amplifier for wireless application
S Mukherjee, S Roy, CK Sarkar
Superlattices and Microstructures 72, 262-271, 2014
32014
Analytical Modeling of DC Parameters of Double Gate Junctionless MOSFET in Near and Subthreshold Regime for RF Circuit Application
D Sen, SJ Sengupta, S Roy, M Chanda, SK Sarkar
Nanoscience & Nanotechnology-Asia 10 (4), 457-470, 2020
22020
DC performance analysis of high-K adiabatic logic circuits in sub-threshold regime for RF applications
SJ Sengupta, D Sen, S Roy, M Chanda, SK Sarkar
Sensor Letters 17 (6), 487-496, 2019
22019
Circuit performance analysis of graded doping of channel of DGMOS with high‐k gate stack for analogue and digital application
S Roy, S Mukherjee, A Dutta, C Kumar Sarkar, C Bose
IET Circuits, Devices & Systems 13 (3), 337-343, 2019
22019
Analysis of DC Parameters of Short-Channel Heterostructure Double Gate Junction-Less MOSFET Circuits Considering Quantum Mechanical Effects
D Sen, SJ Sengupta, S Roy, M Chanda
Silicon 13 (4), 1165-1175, 2021
12021
Evaluation of Selectivity and Sensitivity of Heterostructure Junction-Less DG-MOSFET Based Biosensor Considering Heating Effect
S Chakraborty, D Sen, SJ Sengupta, S Roy
2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS), 374-377, 2020
12020
Investigation of Comparator Architectures in 32 nm Silicon-On-Insulator (SOI) Technology
M Mukherjee, H Saha, S Roy
2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS), 34-37, 2020
12020
Design and analysis of bulk and junctionless MOSFET based circuits for low power applications
S Halder, R Paul, S Roy
2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS), 1-5, 2020
12020
Synthesis and characterisation of TiO2 thin film prepared by spin coating technique
RA Wagh, SP Roy, RS Patil
International Journal of Innovative Research in Science, Engineering and …, 2017
12017
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