| Stacked 3-dimensional 6T SRAM cell with independent double gate transistors M Weis, A Pfitzner, D Kasprowicz, R Emling, T Fischer, S Henzler, W Maly, ... 2009 IEEE International Conference on IC Design and Technology, 169-172, 2009 | 237 | 2009 |
| Twin gate, vertical slit FET (VeSFET) for highly periodic layout and 3D integration W Maly, N Singh, Z Chen, N Shen, X Li, A Pfitzner, D Kasprowicz, ... Proceedings of the 18th International Conference Mixed Design of Integrated …, 2011 | 78 | 2011 |
| CMOS standard cells characterization for defect based testing WA Pleskacz, D Kasprowicz, T Oleszczak, W Kuzmicz Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance …, 2001 | 46 | 2001 |
| Realizing and and or functions with single vertical-slit field-effect transistor A Kamath, Z Chen, N Shen, N Singh, GQ Lo, DL Kwong, D Kasprowicz, ... IEEE Electron Device Letters 33 (2), 152-154, 2011 | 42 | 2011 |
| Is there always performance overhead for regular fabric? YW Lin, M Marek-Sadowska, W Maly, A Pfitzner, D Kasprowicz 2008 IEEE International Conference on Computer Design, 557-562, 2008 | 27 | 2008 |
| Low Power SRAM Cell Using Vertical Slit Field Effect Transistor (VeSFET M Weis, A Pfitzner, DK Kasprowicz, YW Lin, T Fischer, R Emling, ... 34th European Solid-State Circuits Conference, 2008 | 26 | 2008 |
| N-channel junction-less vertical slit field-effect transistor (VeSFET): Fabrication-based feasibility assessment Z Chen, A Kamath, N Singh, N Shen, X Li, GQ Lo, DL Kwong, ... International Proceedings of Computer Science and Information Technology 32, 2012 | 22 | 2012 |
| Static power consumption in nano-cmos circuits: Physics and modelling W Kuzmicz, E Piwowarska, A Pfitzner, D Kasprowicz 2007 14th International Conference on Mixed Design of Integrated Circuits …, 2007 | 22 | 2007 |
| A compact model of VeSFET capacitances D Kasprowicz Proceedings of the 18th International Conference Mixed Design of Integrated …, 2011 | 19 | 2011 |
| Adder circuits with transistors using independently controlled gates M Weis, A Pfitzner, D Kasprowicz, R Emling, W Maly, ... 2009 IEEE International Symposium on Circuits and Systems (ISCAS), 449-452, 2009 | 17 | 2009 |
| Improvement of integrated circuit testing reliability by using the defect based approach D Kasprowicz, WA Pleskacz Microelectronics Reliability 43 (6), 945-953, 2003 | 15 | 2003 |
| Small-signal lumped-element equivalent model for high operating temperature infrared photodetectors K Opalska, LJ Opalski, W Wiatr, J Piotrowski, D Kasprowicz 2016 21st International Conference on Microwave, Radar and Wireless …, 2016 | 6 | 2016 |
| Compact model of the vertical slit field-effect transistor (VeSFET) A Pfitzner, D Kasprowicz Proceedings of the European Solid State Circuit Conference, 2011 | 5 | 2011 |
| Leakage Currents and Static Power Consumption in Nanometr CMOS ICs W KuĽmicz, E Piwowarska, A Pfitzner, DK Kasprowicz | 5 | 2007 |
| VeSFET as an analog-circuit component D Kasprowicz, B Swacha 2013 IEEE 16th International Symposium on Design and Diagnostics of …, 2013 | 4 | 2013 |
| Static power consumption in nano-CMOS circuits: Physics and modeling A Pfitzner, W Kuzmicz, E Piwowarska, D Kasprowicz Proceeding of the 14th International Conference Mixed Design of Integrated …, 2007 | 4 | 2007 |
| IDEs structures created in the physical vacuum deposition process on textile substrates E Korzeniewska, A Szczęsny, D Kasprowicz Journal of Physics: Conference Series 1534 (1), 012004, 2020 | 3 | 2020 |
| Methods for automated detection of plagiarism in integrated-circuit layouts D Kasprowicz, H Wada Microelectronics Journal 45 (9), 1212-1219, 2014 | 3 | 2014 |
| Variability-aware table-based DC model of a dual-gate transistor D Kasprowicz 2017 MIXDES-24th International Conference" Mixed Design of Integrated …, 2017 | 2 | 2017 |
| Computer-aided detection of plagiarism in integrated-circuit layouts D Kasprowicz, H Wada Proceedings of the 20th International Conference Mixed Design of Integrated …, 2013 | 2 | 2013 |
