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Chi-Shuen Lee
Chi-Shuen Lee
Zweryfikowany adres z stanford.edu
Tytuł
Cytowane przez
Cytowane przez
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Energy-efficient abundant-data computing: The N3XT 1,000 x
MMS Aly, M Gao, G Hills, CS Lee, G Pitner, MM Shulaker, TF Wu, ...
Computer 48 (12), 24-33, 2015
2722015
A compact virtual-source model for carbon nanotube FETs in the sub-10-nm regime—Part I: Intrinsic elements
CS Lee, E Pop, AD Franklin, W Haensch, HSP Wong
IEEE transactions on electron devices 62 (9), 3061-3069, 2015
2422015
A compact virtual-source model for carbon nanotube FETs in the sub-10-nm regime—Part II: Extrinsic elements, performance assessment, and design optimization
CS Lee, E Pop, AD Franklin, W Haensch, HSP Wong
IEEE Transactions on Electron Devices 62 (9), 3070-3078, 2015
169*2015
Understanding energy efficiency benefits of carbon nanotube field-effect transistors for digital VLSI
G Hills, MG Bardon, G Doornbos, D Yakimets, P Schuddinck, R Baert, ...
IEEE Transactions on Nanotechnology 17 (6), 1259-1269, 2018
1232018
Compact model for carbon nanotube field-effect transistors including nonidealities and calibrated with experimental data down to 9-nm gate length
J Luo, L Wei, CS Lee, AD Franklin, X Guan, E Pop, DA Antoniadis, ...
IEEE transactions on electron devices 60 (6), 1834-1843, 2013
892013
Model-based visual feedback control for a hand-eye coordinated robotic system
JT Feddema, CSG Lee, OR Mitchell
Computer 25 (8), 21-31, 1992
601992
Rapid co-optimization of processing and circuit design to overcome carbon nanotube variations
G Hills, J Zhang, MM Shulaker, H Wei, CS Lee, A Balasingam, HSP Wong, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015
442015
1D selection device using carbon nanotube FETs for high-density cross-point memory arrays
C Ahn, Z Jiang, CS Lee, HY Chen, J Liang, LS Liyanage, HSP Wong
IEEE Transactions on Electron Devices 62 (7), 2197-2204, 2015
402015
32-bit processor core at 5-nm technology: Analysis of transistor and interconnect impact on VLSI system performance
CS Lee, B Cline, S Sinha, G Yeric, HSP Wong
2016 IEEE international electron devices meeting (IEDM), 28.3. 1-28.3. 4, 2016
372016
Computer recognition of two overlapping parts using a single camera
S Berman, P Parikh, CSG Lee
Computer 18 (03), 70-80, 1985
281985
Stanford virtual-source carbon nanotube field-effect transistors model, Technical User’s Manual
CS Lee, HSP Wong
Dept. Elect. Eng., Stanford Univ., Stanford, CA, USA, 2015
222015
Demand prediction of bicycle sharing systems
YC Yin, CS Lee, YP Wong
URL http://cs229. stanford. edu/proj2014/YuchunYin, ChiShuenLee, Yu-PoWong …, 2012
21*2012
Carbon nanotube circuits: Opportunities and challenges
H Wei, M Shulaker, G Hills, HY Chen, CS Lee, L Liyanage, J Zhang, ...
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 619-624, 2013
172013
Compact modeling and design optimization of carbon nanotube field-effect transistors for the sub-10-nm technology nodes
CS Lee, E Pop, HSP Wong
2015 73rd Annual Device Research Conference (DRC), 275-276, 2015
62015
A 1TnR array architecture using a one-dimensional selection device
C Ahn, Z Jiang, CS Lee, HY Chen, J Liang, LS Liyanage, HSP Wong
2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical …, 2014
62014
Virtual-source carbon nanotube field-effect transistors model
CS Lee, HSP Wong
Version 1 (0), 1, 2015
32015
A compact virtual-source model for carbon nanotube field-effect transistors in the sub-10-nm regime—Part I: Intrinsic elements
CS Lee, E Pop, A Franklin, W Haensch, HSP Wong
IEEE Trans. Electron Devices, 0
3
Compact models of emerging devices
CS Lee, S Yu, X Guan, J Luo, L Wei, HSP Wong
2013 IEEE International Conference of Electron Devices and Solid-state …, 2013
12013
Monocular-Vision-Based Vehicle Detection and Distance Estimation
CS Lee, YP Wong, X Xiao
12013
Device-to-System Performance Evaluation: from Transistor/Interconnect Modeling to VLSI Physical Design and Neural-Network Predictor
CS Lee, B Cline, S Sinha, G Yeric, HSP Wong
arXiv preprint arXiv:2109.07915, 2021
2021
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