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Jinho Lee
Jinho Lee
Zweryfikowany adres z yonsei.ac.kr - Strona główna
Tytuł
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Deep neural networks with weighted spikes
J Kim, H Kim, S Huh, J Lee, K Choi
Neurocomputing 311, 373-386, 2018
692018
In-memory database acceleration on FPGAs: a survey
J Fang, YTB Mulder, J Hidders, J Lee, HP Hofstee
The VLDB Journal 29 (1), 33-59, 2020
552020
Extrav: boosting graph processing near storage with a coherent accelerator
J Lee, H Kim, S Yoo, K Choi, HP Hofstee, GJ Nam, MR Nutter, D Jamsek
Proceedings of the VLDB Endowment 10 (12), 1706-1717, 2017
542017
TEI-NoC: Optimizing ultralow power NoCs exploiting the temperature effect inversion
K Han, JJ Lee, J Lee, W Lee, M Pedram
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
262017
An adaptive routing algorithm for 3D mesh NoC with limited vertical bandwidth
M Zhu, J Lee, K Choi
2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip …, 2012
262012
A deadlock-free routing algorithm requiring no virtual channel on 3D-NoCs with partial vertical connections
J Lee, K Choi
2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 1-2, 2013
242013
Mapping and scheduling of tasks and communications on many-core SoC under local memory constraint
J Lee, MK Chung, YG Cho, S Ryu, JH Ahn, K Choi
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013
222013
Redelf: An energy-efficient deadlock-free routing for 3d nocs with partial vertical connections
J Lee, K Kang, K Choi
ACM Journal on Emerging Technologies in Computing Systems (JETC) 12 (3), 1-22, 2015
182015
Dance: Differentiable accelerator/network co-exploration
K Choi, D Hong, H Yoon, J Yu, Y Kim, J Lee
2021 58th ACM/IEEE Design Automation Conference (DAC), 337-342, 2021
162021
Tree-mesh heterogeneous topology for low-latency noc
S Han, J Lee, K Choi
Proceedings of the 2014 International Workshop on Network on Chip …, 2014
162014
My being to your place, your being to my place: Co-present robotic avatars create illusion of living together
B Kang, I Hwang, J Lee, S Lee, T Lee, Y Chang, MK Lee
Proceedings of the 16th Annual International Conference on Mobile Systems …, 2018
152018
3D network-on-chip with wireless links through inductive coupling
J Lee, M Zhu, K Choi, JH Ahn, R Sharma
2011 International SoC Design Conference, 353-356, 2011
152011
Buffered compares: Excavating the hidden parallelism inside DRAM architectures with lightweight logic
J Lee, JH Ahn, K Choi
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2016
142016
Deflection routing in 3D network-on-chip with TSV serialization
J Lee, D Lee, S Kim, K Choi
2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC), 29-34, 2013
132013
Deflection routing in 3D network-on-chip with limited vertical bandwidth
J Lee, D Lee, S Kim, K Choi
ACM Transactions on Design Automation of Electronic Systems (TODAES) 18 (4 …, 2013
102013
THOR: Orchestrated thermal management of cores and networks in 3D many-core architectures
J Lee, J Ahn, K Choi, K Kang
The 20th Asia and South Pacific Design Automation Conference, 773-778, 2015
92015
Memory-aware mapping and scheduling of tasks and communications on many-core SoC
J Lee, K Choi
17th Asia and South Pacific Design Automation Conference, 419-424, 2012
92012
Refine and recycle: A method to increase decompression parallelism
J Fang, J Chen, J Lee, Z Al-Ars, HP Hofstee
2019 IEEE 30Th international conference on application-specific systems …, 2019
82019
Scalable time-versioning support for property graph databases
WD Vijitbenjaronk, J Lee, T Suzumura, G Tanase
2017 IEEE International Conference on Big Data (Big Data), 1580-1589, 2017
72017
GradPIM: A practical processing-in-DRAM architecture for gradient descent
H Kim, H Park, T Kim, K Cho, E Lee, S Ryu, HJ Lee, K Choi, J Lee
2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021
62021
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