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Hanmin Park
Hanmin Park
Postdoctoral Researcher, Neural Processing Research Center, Seoul National University
Zweryfikowany adres z dal.snu.ac.kr
Tytuł
Cytowane przez
Cytowane przez
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Adaptively weighted round‐robin arbitration for equality of service in a many‐core network‐on‐chip
H Park, K Choi
IET Computers & Digital Techniques 10 (1), 37-44, 2016
142016
Position-based weighted round-robin arbitration for equality of service in many-core network-on-chips
H Park, K Choi
Proceedings of the Fifth International Workshop on Network on Chip …, 2012
142012
Acceleration of DNN backward propagation by selective computation of gradients
G Lee, H Park, N Kim, J Yu, S Jo, K Choi
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
112019
Aging compensation with dynamic computation approximation
H Kim, J Kim, H Amrouch, J Henkel, A Gerstlauer, K Choi, H Park
IEEE Transactions on Circuits and Systems I: Regular Papers 67 (4), 1319-1332, 2020
82020
GradPIM: A practical processing-in-DRAM architecture for gradient descent
H Kim, H Park, T Kim, K Cho, E Lee, S Ryu, HJ Lee, K Choi, J Lee
2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021
62021
Cell division: weight bit-width reduction technique for convolutional neural network hardware accelerators
H Park, K Choi
Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019
52019
Training neural networks with low precision dynamic fixed-point
S Jo, H Park, G Lee, K Choi
2018 IEEE 36th International Conference on Computer Design (ICCD), 405-408, 2018
42018
Leakage power reduction of functional units in processors having zero-overhead loop counter
H Park, JK Paek, J Lee, K Choi
2009 International SoC Design Conference (ISOCC), 492-495, 2009
32009
Quantum-Evolutionary Algorithm 을 이용한 Bit-Parallel 가변 길이 복호기의 Symbol Partitioning 최적화 방법
박한민, 최기영
대한전자공학회 학술대회, 31-34, 2011
22011
GPU 를 이용한 quantum-inspired evolutionary algorithm 가속
류지현, 박한민, 최기영
전자공학회논문지-SD 49 (8), 1-9, 2012
12012
Zero-Overhead Loop 카운터를 이용한 저전력 프로세서 설계
박한민, 최기영
대한전자공학회 학술대회, 455-456, 2008
12008
METHOD AND APPARATUS WITH DATA PROCESSING
S Lee, N Kim, H Park, K Choi
US Patent App. 17/689,454, 2022
2022
ComPreEND: Computation Pruning through Predictive Early Negative Detection for ReLU in a Deep Neural Network Accelerator
N Kim, H Park, D Lee, S Kang, J Lee, K Choi
IEEE Transactions on Computers, 2021
2021
Acceleration of DNN Training Regularization: Dropout Accelerator
G Lee, H Park, S Ryu, HJ Lee
2020 International Conference on Electronics, Information, and Communication …, 2020
2020
Reconfigurable Communication Architecture in Chip Multiprocessors for Equality-of-Service and High Performance
박한민
서울대학교 대학원, 2016
2016
Zero-Overhead Loop 카운터와 Drowsy Instruction Cache 를 이용한 저전력 프로세서 설계
박한민, 김영찬, 최기영
대한전자공학회 학술대회, 67-68, 2010
2010
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