Block-based motion estimation algorithms—a survey M Jakubowski, G Pastuszak Opto-Electronics Review 21, 86-102, 2013 | 136 | 2013 |
Algorithm and architecture design of the H. 265/HEVC intra encoder G Pastuszak, A Abramowski IEEE Transactions on circuits and systems for video technology 26 (1), 210-222, 2015 | 104 | 2015 |
Algorithm and architecture design of the motion estimation for the H. 265/HEVC 4K-UHD encoder G Pastuszak, M Trochimiuk Journal of Real-Time Image Processing 12, 517-529, 2016 | 54 | 2016 |
A high-performance architecture for embedded block coding in JPEG 2000 G Pastuszak IEEE Transactions on Circuits and Systems for Video Technology 15 (9), 1182-1191, 2005 | 47 | 2005 |
Transforms and quantization in the high-throughput H. 264/AVC encoder based on advanced mode selection G Pastuszak 2008 IEEE Computer Society Annual Symposium on VLSI, 203-208, 2008 | 40 | 2008 |
A high-performance architecture of the double-mode binary coder for H. 264. AVC G Pastuszak IEEE Transactions on Circuits and Systems for Video Technology 18 (7), 949-960, 2008 | 37 | 2008 |
Adaptive computationally scalable motion estimation for the hardware H. 264/AVC encoder G Pastuszak, M Jakubowski IEEE Transactions on Circuits and Systems for Video Technology 23 (5), 802-812, 2012 | 35 | 2012 |
A novel architecture of arithmetic coder in JPEG2000 based on parallel symbol encoding G Pastuszak Parallel Computing in Electrical Engineering, 2004. International Conference …, 2004 | 31 | 2004 |
Hardware architectures for the H. 265/HEVC discrete cosine transform G Pastuszak IET Image Processing 9 (6), 468-477, 2015 | 30 | 2015 |
Architecture design and efficiency evaluation for the high-throughput interpolation in the HEVC encoder G Pastuszak, M Trochimiuk 2013 Euromicro conference on digital system design, 423-428, 2013 | 28 | 2013 |
Architecture design of the high-throughput compensator and interpolator for the H. 265/HEVC encoder G Pastuszak, M Trochimiuk Journal of Real-Time Image Processing 11, 663-673, 2016 | 27 | 2016 |
A double-path intra prediction architecture for the hardware H. 265/HEVC encoder A Abramowski, G Pastuszak 17th International Symposium on Design and Diagnostics of Electronic …, 2014 | 22 | 2014 |
A novel intra prediction architecture for the hardware HEVC encoder A Abramowski, G Pastuszak 2013 Euromicro Conference on Digital System Design, 429-436, 2013 | 19 | 2013 |
Architecture design of the H. 264/AVC encoder based on rate-distortion optimization G Pastuszak IEEE Transactions on Circuits and Systems for Video Technology 25 (11), 1844 …, 2015 | 18 | 2015 |
Flexible architecture design for H. 265/HEVC inverse transform G Pastuszak Circuits, Systems, and Signal Processing 34, 1931-1945, 2015 | 17 | 2015 |
Optimization of the adaptive computationally-scalable motion estimation and compensation for the hardware H. 264/AVC encoder G Pastuszak, M Jakubowski Journal of Signal Processing Systems 82, 391-402, 2016 | 15 | 2016 |
Generative multi-symbol architecture of the binary arithmetic coder for UHDTV video encoders G Pastuszak IEEE Transactions on Circuits and Systems I: Regular Papers 67 (3), 891-902, 2019 | 12 | 2019 |
FPGA design of the computation unit for the semi-global stereo matching algorithm M Roszkowski, G Pastuszak 17th International Symposium on Design and Diagnostics of Electronic …, 2014 | 12 | 2014 |
Intra prediction for the hardware H. 264/AVC high profile encoder M Roszkowski, G Pastuszak Journal of Signal Processing Systems 76, 11-17, 2014 | 10 | 2014 |
An Adaptive Computation-aware Algorithm for Multi-frame Variable Block-size Motion Estimation in H. 264/AVC. MH Jakubowski, G Pastuszak SIGMAP, 122-125, 2009 | 10 | 2009 |