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Joao Andrade
Joao Andrade
Applications Engineer, Synopsys Inc.
Zweryfikowany adres z synopsys.com - Strona główna
Tytuł
Cytowane przez
Cytowane przez
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Portable LDPC Decoding on Multicores Using OpenCL
G Falcao, V Silva, L Sousa, J Andrade
622012
A survey on high-throughput non-binary LDPC decoders: ASIC, FPGA, and GPU architectures
O Ferraz, S Subramaniyan, R Chinthala, J Andrade, JR Cavallaro, ...
IEEE Communications Surveys & Tutorials 24 (1), 524-556, 2021
432021
GPU-based DVB-S2 LDPC decoder with high throughput and fast error floor detection
G Falcao, J Andrade, V Silva, L Sousa
Electronics Letters 47 (9), 542-543, 2011
372011
Design Space Exploration of LDPC Decoders using High-Level Synthesis
J Andrade, N George, K Karras, D Novo, F Pratas, L Sousa, P Ienne, ...
IEEE Access, 2017
302017
Flexible design of wide‐pipeline‐based WiMAX QC‐LDPC decoder architectures on FPGAs using high‐level synthesis
J Andrade, G Falcao, V Silva
Electronics letters 50 (11), 839-840, 2014
292014
A Survey on Programmable LDPC Decoders
J Andrade, G Falcao, V Silva, L Sousa
IEEE Access 4, 6704-6718, 2016
282016
Near-LSPA performance at MSA complexity
J Andrade, G Falcao, V Silva, JP Barreto, N Goncalves, V Savin
2013 IEEE International Conference on Communications (ICC), 3281-3285, 2013
222013
Optimized fast walsh–hadamard transform on gpus for non-binary ldpc decoding
J Andrade, G Falcao, V Silva
Parallel Computing 40 (9), 449-453, 2014
202014
Open the Gates: Using High-level Synthesis towards programmable LDPC decoders on FPGAs.
F Pratas, J Andrade, G Falcao, V Silva, L Sousa
GlobalSIP, 1274-1277, 2013
192013
Unreliable Memory Operation on a Convolutional Neural Network Processor
J Marques, J Andrade, G Falcao
2017 IEEE International Workshop on Signal Processing Systems (SiPS), 2017
182017
Combining flexibility with low power: Dataflow and wide-pipeline LDPC decoding engines in the Gbit/s era
J Andrade, F Pratas, G Falcao, V Silva, L Sousa
2014 IEEE 25th International Conference on Application-specific Systems …, 2014
182014
Enhancing design space exploration by extending CPU/GPU specifications onto FPGAs
M Owaida, G Falcao, J Andrade, C Antonopoulos, N Bellas, ...
ACM Transactions on Embedded Computing Systems, 2014
172014
Flexible non-binary ldpc decoding on fpgas
J Andrade, G Falcao, V Silva, K Kasai
2014 IEEE International Conference on Acoustics, Speech and Signal …, 2014
172014
FFT-SPA non-binary LDPC decoding on GPU
J Andrade, G Falcao, V Silva, K Kasai
2013 IEEE International Conference on Acoustics, Speech and Signal …, 2013
162013
The impact of faulty memory bit cells on the decoding of spatially-coupled LDPC codes
J Mu, A Vosoughi, J Andrade, A Balatsoukas-Stimming, G Karakonstantis, ...
2015 49th Asilomar Conference on Signals, Systems and Computers, 1627-1631, 2015
152015
From low-architectural expertise up to high-throughput non-binary LDPC decoders: Optimization guidelines using high-level synthesis
J Andrade, N George, K Karras, D Novo, V Silva, P Ienne, G Falcao
Field Programmable Logic and Applications (FPL), 2015 25th International …, 2015
142015
Real-time DVB-S2 LDPC decoding on many-core GPU accelerators
G Falcao, J Andrade, V Silva, L Sousa
Acoustics, Speech and Signal Processing (ICASSP), 2011 IEEE International …, 2011
122011
Fast Design Space Exploration Using Vivado HLS: Non-binary LDPC Decoders
J Andrade, N George, K Karras, D Novo, V Silva, P Ienne, G Falcao
2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom …, 2015
102015
On the performance of LDPC and turbo decoder architectures with unreliable memories
J Andrade, A Vosoughi, G Wang, G Karakonstantis, A Burg, G Falcao, ...
2014 48th Asilomar Conference on Signals, Systems and Computers, 542-547, 2014
102014
Stressing the BER simulation of LDPC codes in the error floor region using GPU clusters
G Falcao, J Andrade, V Silva, S Yamagiwa
ISWCS 2013; The Tenth International Symposium on Wireless Communication …, 2013
102013
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