| Power-saving design opportunities for wireless intracortical brain–computer interfaces N Even-Chen, DG Muratore, SD Stavisky, LR Hochberg, JM Henderson, ... Nature biomedical engineering 4 (10), 984-996, 2020 | 77 | 2020 |
| A data-compressive wired-OR readout for massively parallel neural recording DG Muratore, P Tandon, M Wootters, EJ Chichilnisky, S Mitra, B Murmann IEEE transactions on biomedical circuits and systems 13 (6), 1128-1140, 2019 | 26 | 2019 |
| An 800 nW switched-capacitor feature extraction filterbank for sound classification DA Villamizar, DG Muratore, JB Wieser, B Murmann IEEE Transactions on Circuits and Systems I: Regular Papers 68 (4), 1578-1588, 2021 | 24 | 2021 |
| Artificial retina: a future cellular-resolution brain-machine interface DG Muratore, EJ Chichilnisky NANO-CHIPS 2030: On-Chip AI for an Efficient Data-Driven World, 443-465, 2020 | 18 | 2020 |
| An 8-bit 0.7-GS/s single channel flash-SAR ADC in 65-nm CMOS technology DG Muratore, A Akdikmen, E Bonizzoni, F Maloberti, UF Chio, SW Sin, ... ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 421-424, 2016 | 12 | 2016 |
| Sound classification using summary statistics and N-path filtering D Villamizar, D Battaglino, DG Muratore, R Hoshyar, B Murmann 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019 | 9 | 2019 |
| Low-Noise Integrated Potentiostat for Affinity-Free Protein Detection With 12 nV/rt-Hz at 30 Hz and 1.8 pArms Resolution S Fischer, D Muratore, S Weinreich, A Peña-Perez, RM Walker, C Gupta, ... IEEE Solid-State Circuits Letters 2 (6), 41-44, 2019 | 7 | 2019 |
| Very high-speed CMOS comparators for multi-GS/s A/D converters DG Muratore, A Akdikmen, F Maloberti 2015 11th Conference on Ph. D. Research in Microelectronics and Electronics …, 2015 | 6 | 2015 |
| A 1024-Channel 268 nW/pixel 36x36 μm2/ch Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces MH Jang, WH Yu, C Lee, M Hays, P Wang, N Vitale, P Tandon, P Yan, ... 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2023 | 5 | 2023 |
| A Low-Power Oscillatory Feature Extraction Unit for Implantable Neural Interfaces H Yassin, A Akhoundi, ES Hasaneen, DG Muratore 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2023 | 3 | 2023 |
| A Study of Successive Approximation Register ADC Architectures DG Muratore Università degli studi di Pavia, 2017 | 3 | 2017 |
| A pipeline ADC for very high conversion rates DG Muratore, E Bonizzoni, F Maloberti 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 1446-1449, 2016 | 3 | 2016 |
| A capacitive sensor interface for high-resolution acquisitions in hostile environments DG Muratore, E Bonizzoni, F Maloberti, C Fiocchi 2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS), 167-170, 2016 | 3 | 2016 |
| Data Compression Versus Signal Fidelity Tradeoff in Wired-OR Analog-to-Digital Compressive Arrays for Neural Recording P Yan, A Akhoundi, NP Shah, P Tandon, DG Muratore, EJ Chichilnisky, ... IEEE transactions on biomedical circuits and systems, 2023 | 2 | 2023 |
| FARA: a fast artifact recovery algorithm with optimum stimulation waveform for single-cell resolution massively parallel neural interfaces R Brash, W Serdijn, DG Muratore 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 190-194, 2022 | 2 | 2022 |
| Sensory particles with optical telemetry K Ganesan, TA Flores, BQ Le, DG Muratore, N Patel, S Mitra, B Murmann, ... 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 2 | 2020 |
| High-resolution time-interleaved eight-channel ADC for Li-ion battery stacks DG Muratore, E Bonizzoni, S Verri, F Maloberti IEEE Transactions on Circuits and Systems II: Express Briefs 64 (6), 620-624, 2016 | 2 | 2016 |
| A split transconductor high-speed SAR ADC DG Muratore, E Bonizzoni, F Maloberti 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2433-2436, 2015 | 2 | 2015 |
| Under review N Huang, D Muratore Control complements in Mandarin Chinese: implications for restructuring and …, 0 | 2 | |
| A Power-Efficient Oscillatory Synchronization Feature Extractor for Closed-Loop Neuromodulation H Yassin, A Akhoundi, ES Hasaneen, DG Muratore IEEE Transactions on Circuits and Systems II: Express Briefs, 2024 | 1 | 2024 |
Boris MurmannUniversity of HawaiiZweryfikowany adres z hawaii.edu
