Radu Sporea

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SRP Silva (Ravi Silva)University of Surrey, Advanced Technology InstituteVerified email at surrey.ac.uk
Brice Le BorgneAssistant professor, Université de ToursVerified email at univ-tours.fr
Dr Maxim ShkunovUniversity of Surrey, Electrical and Electronic EngineeringVerified email at surrey.ac.uk
olivier de Sagazandepartement Microelectronic IETR / NanoRennesVerified email at univ-rennes1.fr
Imalka Jayawardena, B.Sc, P.hDNanoelectronics centre, Advanced Technology Institute, University of SurreyVerified email at surrey.ac.uk
Stamatis GeorgakopoulosUniversity of MurciaVerified email at um.es
David FrohlichProfessor of Interaction Design, Director of Digital World Research Centre, University of SurreyVerified email at surrey.ac.uk
Georgios BairaktarisPostgraduate Researcher, University of SurreyVerified email at surrey.ac.uk
Indrachapa BandaraResearch Fellow, University of SurreyVerified email at surrey.ac.uk
Simon OgierSmartKemVerified email at neudrive.com
Mario CaironiSenior Researcher, Istituto Italiano di Tecnologia, Center for Nano Science and TechnologyVerified email at iit.it
Wei TangShanghai Jiao Tong UniversityVerified email at sjtu.edu.cn
Jiaqing ZhaoShanghai Jiao Tong UniversityVerified email at sjtu.edu.cn
Prof. Feng YanDepartment of Applied Physics, The Hong Kong Polytechnic UniversityVerified email at polyu.edu.hk
Jordi CarrabinaUniversitat Autònoma de barcelonaVerified email at uab.cat
Andrea PerinotCenter for Nano Science and Technology@PoliMi, Istituto Italiano di Tecnologia, Milano, ItalyVerified email at iit.it
Tse Nga Tina NgUniversity of California San Diego, previously at Palo Alto Research CenterVerified email at eng.ucsd.edu
Alquier DanielGREMAN, Université de ToursVerified email at univ-tours.fr
Guylaine Poulin-VittrantCNRS UMR7347 GREMANVerified email at univ-tours.fr
abhishek singh dahiyaResearch Associate, Bendable Electronics and Sensing Technologies (BEST) Group Electronics and NanoVerified email at glasgow.ac.uk

Radu Sporea

Lecturer in Semiconductor Devices

Verified email at surrey.ac.uk - Homepage

Large area printed and power efficient electronics


Title Sort by citations Sort by year Sort by title	Cited by Cited by	Year
Current status and opportunities of organic thin-film transistor technologies X Guo, Y Xu, S Ogier, TN Ng, M Caironi, A Perinot, L Li, J Zhao, W Tang, ... IEEE transactions on electron devices 64 (5), 1906-1921, 2017	194	2017
Source-gated transistors for order-of-magnitude performance improvements in thin-film digital circuits RA Sporea, MJ Trainor, ND Young, JM Shannon, SRP Silva Scientific reports 4 (1), 1-7, 2014	54	2014
Intrinsic gain in self-aligned polysilicon source-gated transistors RA Sporea, MJ Trainor, ND Young, JM Shannon, SRP Silva IEEE transactions on electron devices 57 (10), 2434-2439, 2010	50	2010
Low-field behavior of source-gated transistors JM Shannon, RA Sporea, S Georgakopoulos, M Shkunov, SRP Silva IEEE transactions on electron devices 60 (8), 2444-2449, 2013	38	2013
Field plate optimization in low-power high-gain source-gated transistors RA Sporea, MJ Trainor, ND Young, JM Shannon, SRP Silva IEEE transactions on electron devices 59 (8), 2180-2186, 2012	35	2012
Single-crystalline ZnO sheet source-gated transistors AS Dahiya, C Opoku, RA Sporea, B Sarvankumar, G Poulin-Vittrant, ... Scientific Reports 6 (1), 1-10, 2016	34	2016
Tin (iv) dopant removal through anti-solvent engineering enabling tin based perovskite solar cells with high charge carrier mobilities RMI Bandara, K Jayawardena, SO Adeyemo, SJ Hinder, JA Smith, ... Journal of Materials Chemistry C 7 (27), 8389-8397, 2019	28	2019
Exceptional rate capability from carbon‐encapsulated polyaniline supercapacitor electrodes A Stott, MO Tas, EY Matsubara, MG Masteghin, JM Rosolen, RA Sporea, ... Energy & Environmental Materials 3 (3), 389-397, 2020	26	2020
Stability evaluation of ZnO nanosheet based source-gated transistors AS Dahiya, RA Sporea, G Poulin-Vittrant, D Alquier Scientific Reports 9 (1), 1-11, 2019	24	2019
Source-gated transistors for power-and area-efficient AMOLED pixel circuits X Xu, RA Sporea, X Guo Journal of Display Technology 10 (11), 928-933, 2014	24	2014
Performance trade-offs in polysilicon source-gated transistors RA Sporea, MJ Trainor, ND Young, X Guo, JM Shannon, SRP Silva Solid-State Electronics 65, 246-249, 2011	24	2011
Approaching the Shockley–Queisser limit for fill factors in lead–tin mixed perovskite photovoltaics K Jayawardena, RMI Bandara, M Monti, E Butler-Caddle, T Pichler, ... Journal of Materials Chemistry A 8 (2), 693-705, 2020	22	2020
Water Transfer Printing Enhanced by Water‐Induced Pattern Expansion: Toward Large‐Area 3D Electronics B Le Borgne, S Liu, X Morvan, S Crand, RA Sporea, N Lu, M Harnois Advanced Materials Technologies 4 (4), 1800600, 2019	21	2019
Setup for the in situ monitoring of the irradiation-induced effects in optical fibers in the ultraviolet-visible optical range DG Sporea, RA Sporea Review of scientific instruments 76 (11), 113110, 2005	20	2005
Novel Tunnel‐Contact‐Controlled IGZO Thin‐Film Transistors with High Tolerance to Geometrical Variability RA Sporea, KM Niang, AJ Flewitt, SRP Silva Advanced Materials 31 (36), 1902551, 2019	19	2019
Temperature dependence of the current in Schottky-barrier source-gated transistors RA Sporea, M Overy, JM Shannon, SRP Silva Journal of Applied Physics 117 (18), 184502, 2015	17	2015
Self-heating effects in polysilicon source gated transistors RA Sporea, T Burridge, SRP Silva Scientific reports 5 (1), 1-11, 2015	16	2015
Down-scaling of thin-film transistors: Opportunities and design challenges X Guo, R Sporea, J Shannon, SR Silva ECS Transactions 22 (1), 227, 2009	16	2009
Design considerations for the source region of Schottky-barrier source-gated transistors RA Sporea, SRP Silva 2017 International Semiconductor Conference (CAS), 155-158, 2017	14	2017
Effects of process variations on the current in Schottky Barrier Source-Gated Transistors RA Sporea, X Guo, JM Shannon, SRP Silva 2009 International Semiconductor Conference 2, 413-416, 2009	14	2009

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