Using LSTM recurrent neural networks for monitoring the LHC superconducting magnets M Wielgosz, A Skoczeń, M Mertik Nuclear Instruments and Methods in Physics Research Section A: Accelerators …, 2017 | 88 | 2017 |
Mapping neural networks to FPGA-based IoT devices for ultra-low latency processing M Wielgosz, M Karwatowski Sensors 19 (13), 2981, 2019 | 36 | 2019 |
FPGA implementation of 64-bit exponential function for HPC E Jamro, K Wiatr, M Wielgosz 2007 International Conference on Field Programmable Logic and Applications …, 2007 | 32 | 2007 |
Predictive maintenance of induction motors using ultra-low power wireless sensors and compressed recurrent neural networks M Markiewicz, M Wielgosz, M Bocheński, W Tabaczyński, T Konieczny, ... IEEE Access 7, 178891-178902, 2019 | 30 | 2019 |
Highly efficient structure of 64-bit exponential function implemented in FPGAs M Wielgosz, E Jamro, K Wiatr Reconfigurable Computing: Architectures, Tools and Applications: 4th …, 2008 | 30 | 2008 |
Methodologies of compressing a stable performance convolutional neural networks in image classification M Al-Hami, M Pietron, R Casas, M Wielgosz Neural Processing Letters 51, 105-127, 2020 | 26 | 2020 |
The model of an anomaly detector for HiLumi LHC magnets based on Recurrent Neural Networks and adaptive quantization M Wielgosz, M Mertik, A Skoczeń, E De Matteis Engineering Applications of Artificial Intelligence 74, 166-185, 2018 | 26 | 2018 |
Comparison of GPU and FPGA implementation of SVM algorithm for fast image segmentation M Pietron, M Wielgosz, D Zurek, E Jamro, K Wiatr Architecture of Computing Systems–ARCS 2013: 26th International Conference …, 2013 | 25 | 2013 |
FPGA implementaton of strongly parallel histogram equalization E Jamro, M Wielgosz, K Wiatr 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems, 1-6, 2007 | 24 | 2007 |
Comparison of Hybrid Sorting Algorithms Implemented on Different Parallel Hardware Platforms D Żurek, M Pietroń, M Wielgosz, K Wiatr Computer Science 14 (4), 679--691, 2013 | 22* | 2013 |
FPGA implementation of the dynamic Huffman encoder E Jamro, M Wielgosz, K Wiatr IFAC Proceedings Volumes 39 (21), 60-65, 2006 | 21 | 2006 |
Recurrent Neural Networks for anomaly detection in the Post-Mortem time series of LHC superconducting magnets M Wielgosz, A Skoczeń, M Mertik arXiv preprint arXiv:1702.00833, 2017 | 17 | 2017 |
FPGA–ARM heterogeneous system for high speed signal analysis E Jamro, M Wielgosz, S Bieniasz, W Cioch Solid State Phenomena 180, 207-213, 2012 | 16 | 2012 |
Protection of superconducting industrial machinery using RNN-based anomaly detection for implementation in smart sensor M Wielgosz, A Skoczeń, E De Matteis Sensors 18 (11), 3933, 2018 | 13 | 2018 |
Retrain or not retrain?-Efficient pruning methods of deep CNN networks M Pietron, M Wielgosz Computational Science–ICCS 2020: 20th International Conference, Amsterdam …, 2020 | 12 | 2020 |
Parallel Implementation of Spatial Pooler in Hierarchical Temporal Memory. M Pietron, M Wielgosz, K Wiatr ICAART (2), 346-353, 2016 | 12 | 2016 |
FPGA implementation of the selected parts of the fast image segmentation M Wielgosz, E Jamro, D Żurek, K Wiatr Intelligent Tools for Building a Scientific Information Platform, 203-216, 2012 | 12 | 2012 |
An FPGA-based platform for a network architecture with delay guarantee M Wielgosz, M Panggabean, J Wang, LA Rønningen Journal of Circuits, Systems and Computers 22 (06), 1350045, 2013 | 11 | 2013 |
Roadmap on artificial intelligence and big data techniques for superconductivity M Yazdani-Asrami, W Song, A Morandi, G De Carne, J Murta-Pina, ... Superconductor Science and Technology 36 (4), 043501, 2023 | 10 | 2023 |
Using spatial pooler of hierarchical temporal memory to classify noisy videos with predefined complexity M Wielgosz, M Pietroń Neurocomputing 240, 84-97, 2017 | 10 | 2017 |