Maciej Wielgosz
Cited by
Cited by
Using LSTM recurrent neural networks for monitoring the LHC superconducting magnets
M Wielgosz, A Skoczeń, M Mertik
Nuclear Instruments and Methods in Physics Research Section A: Accelerators …, 2017
Highly efficient structure of 64-bit exponential function implemented in FPGAs
M Wielgosz, E Jamro, K Wiatr
International Workshop on Applied Reconfigurable Computing, 274-279, 2008
FPGA implementation of 64-bit exponential function for HPC
E Jamro, K Wiatr, M Wielgosz
2007 International Conference on Field Programmable Logic and Applications …, 2007
FPGA implementaton of strongly parallel histogram equalization
E Jamro, M Wielgosz, K Wiatr
2007 IEEE Design and Diagnostics of Electronic Circuits and Systems, 1-6, 2007
FPGA implementation of the dynamic Huffman encoder
E Jamro, M Wielgosz, K Wiatr
IFAC Proceedings Volumes 39 (21), 60-65, 2006
FPGA–ARM heterogeneous system for high speed signal analysis
E Jamro, M Wielgosz, S Bieniasz, W Cioch
Solid State Phenomena 180, 207-213, 2012
Comparison of GPU and FPGA implementation of SVM algorithm for fast image segmentation
M Pietron, M Wielgosz, D Zurek, E Jamro, K Wiatr
International Conference on Architecture of Computing Systems, 292-302, 2013
Comparison of Hybrid Sorting Algorithms Implemented on Different Parallel Hardware Platforms
D Żurek, M Pietroń, M Wielgosz, K Wiatr
Computer Science 14 (4), 679--691, 2013
Mapping neural networks to FPGA-based IoT devices for ultra-low latency processing
M Wielgosz, M Karwatowski
Sensors 19 (13), 2981, 2019
An FPGA-based platform for a network architecture with delay guarantee
M Wielgosz, M Panggabean, J Wang, LA Rønningen
Journal of Circuits, Systems and Computers 22 (06), 1350045, 2013
Accelerating calculations on the RASC platform: A case study of the exponential function
M Wielgosz, E Jamro, K Wiatr
International Workshop on Applied Reconfigurable Computing, 306-311, 2009
Methodologies of compressing a stable performance convolutional neural networks in image classification
M Pietron, R Casas, M Wielgosz
Neural Processing Letters 51 (1), 105-127, 2020
The model of an anomaly detector for HiLumi LHC magnets based on Recurrent Neural Networks and adaptive quantization
M Wielgosz, M Mertik, A Skoczeń, E De Matteis
Engineering Applications of Artificial Intelligence 74, 166-185, 2018
Formal analysis of HTM spatial pooler performance under predefined operation conditions
M Pietroń, M Wielgosz, K Wiatr
International joint conference on rough sets, 396-405, 2016
Recurrent Neural Networks for anomaly detection in the Post-Mortem time series of LHC superconducting magnets
M Wielgosz, A Skoczeń, M Mertik
arXiv preprint arXiv:1702.00833, 2017
Using Spatial Pooler of Hierarchical Temporal Memory for object classification in noisy video streams
M Wielgosz, M Pietroń, K Wiatr
2016 Federated Conference on Computer Science and Information Systems …, 2016
Parallel Implementation of Spatial Pooler in Hierarchical Temporal Memory.
M Pietron, M Wielgosz, K Wiatr
ICAART (2), 346-353, 2016
FPGA implementation of the selected parts of the fast image segmentation
M Wielgosz, E Jamro, D Żurek, K Wiatr
Intelligent Tools for Building a Scientific Information Platform, 203-216, 2012
The implementation of the customized, parallel architecture for a fast word-match program
E Jamro, P Russek, A Dabrowska-Boruch, M Wielgosz, K Wiatr
International Journal of Computer Systems Science & Engineering 26 (4), 285-292, 2011
Analysis of the Basic Implementation Aspects of Hardware-Accelerated Density Functional Theory Calculations
M Wielgosz, G Mazur, M Makowski, E Jamro, P Russek, K Wiatr
Computing and Informatics 29 (6), 989-1000, 2010
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