| Efficient implementation of Virtual Coarse Grained Reconfigurable Arrays on FPGAS K Heyse, T Davidson, E Vansteenkiste, K Bruneel, D Stroobandt Field Programmable Logic and Applications (FPL), 2013 23rd International …, 2013 | 30 | 2013 |
| Mapping logic to reconfigurable FPGA routing K Heyse, K Bruneel, D Stroobandt Field Programmable Logic and Applications (FPL), 2012 22nd International …, 2012 | 19 | 2012 |
| FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration D Pnevmatikatos, K Papadimitriou, T Becker, P Böhm, A Brokalakis, ... Microprocessors and Microsystems 39 (4), 321-338, 2015 | 16 | 2015 |
| FASTER: Facilitating analysis and synthesis technologies for effective reconfiguration D Pnevmatikatos, T Becker, A Brokalakis, K Bruneel, G Gaydadjiev, W Luk, ... Digital System Design (DSD), 2012 15th Euromicro Conference on, 234-241, 2012 | 16 | 2012 |
| Performance Evaluation of Dynamic Circuit Specialization on Xilinx FPGAs A Kulkarni, K Heyse, T Davidson, D Stroobandt Proceedings of the FPGA World Conference 2014, 1, 2014 | 14 | 2014 |
| TCONMAP: Technology Mapping for Parameterised FPGA Configurations K Heyse, B Al Farisi, K Bruneel, D Stroobandt ACM Transactions on Design Automation of Electronic Systems (TODAES) 20 (4), 48, 2015 | 12 | 2015 |
| Improving reconfiguration speed for dynamic circuit specialization using placement constraints A Kulkarni, T Davidson, K Heyse, D Stroobandt ReConFigurable Computing and FPGAs (ReConFig), 2014 International Conference …, 2014 | 10 | 2014 |
| Enabling FPGA routing configuration sharing in dynamic partial reconfiguration B Al Farisi, K Heyse, K Bruneel, J Cardoso, D Stroobandt Design Automation for Embedded Systems 19 (1-2), 189-221, 2015 | 6 | 2015 |
| Automating reconfiguration chain generation for SRL-Based run-time reconfiguration K Heyse, B Al Farisi, K Bruneel, D Stroobandt Reconfigurable Computing: Architectures, Tools and Applications, 1-12, 2012 | 6 | 2012 |
| Reducing the overhead of dynamic partial reconfiguration for multi-mode circuits B Al Farisi, K Heyse, D Stroobandt Field-Programmable Technology (FPT), 2014 International Conference on, 282-283, 2014 | 4 | 2014 |
| Memory-efficient and fast run-time reconfiguration of regularly structured designs B Al Farisi, K Heyse, K Bruneel, D Stroobandt Field Programmable Logic and Applications (FPL), 2011 International …, 2011 | 4 | 2011 |
| Proving correctness of regular expression matchers with constrained repetition K Heyse, K Bruneel, D Stroobandt Electronics Letters 49 (1), 41-42, 2013 | 3 | 2013 |
| On the Impact of Replacing Low-Speed Configuration Buses on FPGAs with the Chip’s Internal Configuration Infrastructure K Heyse, J Basteleus, BA Farisi, D Stroobandt, O Kadlcek, O Pell ACM Transactions on Reconfigurable Technology and Systems (TRETS) 9 (1), 6, 2015 | 2 | 2015 |
| Estimating circuit delays in FPGAs after technology mapping B Severens, E Vansteenkiste, K Heyse, D Stroobandt Field Programmable Logic and Applications (FPL), 2015 25th International …, 2015 | 2 | 2015 |
| Avoiding transitional effects in dynamic circuit specialisation on FPGAs K Heyse, D Stroobandt Proceedings of the 52nd Annual Design Automation Conference, 159, 2015 | 1 | 2015 |
| Identification of Dynamic Circuit Specialization Opportunities in RTL Code T Davidson, E Vansteenkiste, K Heyse, K Bruneel, D Stroobandt ACM Transactions on Reconfigurable Technology and Systems (TRETS) 8 (1), 4, 2015 | 1 | 2015 |
| On the Impact of Replacing a Low-Speed Memory Bus on the Maxeler Platform, Using the FPGA’s Configuration Infrastructure K Heyse, D Stroobandt, O Kadlcek, O Pell Reconfigurable Computing: Architectures, Tools, and Applications, 85-96, 2014 | 1 | 2014 |
| Automatiseren van SRL-herconfiguratie K Heyse | 1* | |
| Implementation of Regular Expressions with Constraint Repetition K Heyse, K Bruneel, D Stroobandt | | 2012 |
Karel BruneelGhent UniversityZweryfikowany adres z ugent.be
