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Uksong Kang
Uksong Kang
SK Hynix, Vice President
Zweryfikowany adres z sk.com
Tytuł
Cytowane przez
Cytowane przez
Rok
8 Gb 3-D DDR3 DRAM using through-silicon-via technology
U Kang, HJ Chung, S Heo, DH Park, H Lee, JH Kim, SH Ahn, SH Cha, ...
IEEE Journal of Solid-State Circuits 45 (1), 111-119, 2009
6602009
A high-speed capacitive humidity sensor with on-chip thermal reset
U Kang, KD Wise
IEEE Transactions on Electron Devices 47 (4), 702-710, 2000
2682000
Semiconductor package having memory devices stacked on logic device
K Uk-Song
US Patent 7,834,450, 2010
2402010
Co-architecting controllers and DRAM to enhance DRAM process scaling
U Kang, HS Yu, C Park, H Zheng, J Halbert, K Bains, S Jang, JS Choi
The memory forum 14, 2014
1822014
Multi-chip memory device with stacked memory chips, method of stacking memory chips, and method of controlling operation of multi-chip package memory
H Chung, JB Lee, K Uk-Song
US Patent 7,830,692, 2010
1312010
Semiconductor device having stacked structure including through-silicon-vias and method of testing the same
K Uk-Song
US Patent App. 13/312,000, 2012
1052012
Stacked memory module and system
K Uk-Song, H Chung, JS Choi, H Lee
US Patent 8,031,505, 2011
1012011
Memory system
H Yu, K Uk-Song, CW Park, JS Choi, HS Hwang
US Patent App. 13/604,308, 2013
802013
A 1.2 V 20 nm 307 GB/s HBM DRAM with at-speed wafer-level IO test scheme and adaptive refresh considering temperature distribution
K Sohn, WJ Yun, R Oh, CS Oh, SY Seo, MS Park, DH Shin, WC Jung, ...
IEEE Journal of Solid-State Circuits 52 (1), 250-260, 2016
732016
Semiconductor memory device
K Uk-Song, YH Jun, JS Choi
US Patent 8,885,380, 2014
692014
3D semiconductor device
K Uk-Song, DH Jang, SJ Jang, H Lee, JH Kim, NS Kim, B Moon, W Lee
US Patent 8,743,582, 2014
672014
Method and apparatus for refreshing and data scrubbing memory device
K Uk-Song, H Yu, CW Park
US Patent 9,053,813, 2015
602015
Memory modules and memory systems
JP Son, K Uk-Song, CW Park, YS Sohn
US Patent 9,087,614, 2015
582015
Semiconductor memory device having adjustable refresh period, memory system comprising same, and method of operating same
K Uk-Song
US Patent 9,153,294, 2015
482015
Dynamic random access memory device and method of determining refresh cycle thereof
SS Pyo, K Uk-Song
US Patent 7,894,282, 2011
482011
Multi-chip package (MCP) having three dimensional mesh-based power distribution network, and power distribution method of the MCP
H Lee, KW Lee, K Uk-Song
US Patent App. 12/458,124, 2010
412010
Memory device with flexible internal data write control circuitry
U Kang, CE Cox
US Patent 10,249,351, 2019
382019
Memory device with flexible internal data write control circuitry
U Kang, CE Cox
US Patent 10,249,351, 2019
382019
Semiconductor package having memory devices stacked on logic device
K Uk-Song
US Patent 8,253,244, 2012
332012
Integrated DDR/SDR flow control managers that support multiple queues and MUX, DEMUX and broadcast operating modes
RT Knaack, DS Gibson, M Montana, M Au, S Speed, SSB Bamdhamravuri, ...
US Patent 7,082,071, 2006
282006
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