A Batteryless 19 Y Zhang, F Zhang, Y Shakhsheer, JD Silver, A Klinefelter, M Nagaraju, ...
IEEE Journal of solid-state circuits 48 (1), 199-213, 2012
423 2012 Simba: Scaling deep-learning inference with multi-chip-module-based architecture YS Shao, J Clemons, R Venkatesan, B Zimmer, M Fojtik, N Jiang, B Keller, ...
Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019
361 2019 A batteryless 19μW MICS/ISM-band energy harvesting body area sensor node SoC F Zhang, Y Zhang, J Silver, Y Shakhsheer, M Nagaraju, A Klinefelter, ...
2012 IEEE International Solid-State Circuits Conference, 298-300, 2012
166 2012 21.3 A 6.45 μW self-powered IoT SoC with integrated energy-harvesting power management and ULP asymmetric radios A Klinefelter, NE Roberts, Y Shakhsheer, P Gonzalez, A Shrivastava, ...
2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015
127 2015 Magnet: A modular accelerator generator for neural networks R Venkatesan, YS Shao, M Wang, J Clemons, S Dai, M Fojtik, B Keller, ...
2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019
113 2019 A 6.45 A Roy, A Klinefelter, FB Yahya, X Chen, LP Gonzalez-Guerrero, CJ Lukas, ...
IEEE Transactions on biomedical circuits and systems 9 (6), 862-874, 2015
102 2015 A 0.32–128 TOPS, scalable multi-chip-module-based deep neural network inference accelerator with ground-referenced signaling in 16 nm B Zimmer, R Venkatesan, YS Shao, J Clemons, M Fojtik, N Jiang, B Keller, ...
IEEE Journal of Solid-State Circuits 55 (4), 920-932, 2020
90 2020 A modular digital VLSI flow for high-productivity SoC design B Khailany, E Khmer, R Venkatesan, J Clemons, JS Emer, M Fojtik, ...
Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018
73 2018 Accelerating chip design with machine learning B Khailany
Proceedings of the 2020 ACM/IEEE Workshop on Machine Learning for CAD, 33-33, 2020
69 2020 A 0.11 pj/op, 0.32-128 tops, scalable multi-chip-module-based deep neural network accelerator with ground-reference signaling in 16nm B Zimmer, R Venkatesan, YS Shao, J Clemons, M Fojtik, N Jiang, B Keller, ...
2019 Symposium on VLSI Circuits, C300-C301, 2019
52 2019 Ultra low power sensing platform with multimodal radios BH Calhoun, Y Shakhsheer, Y Zhang, A Klinefelter, DD Wentzloff, ...
US Patent 9,729,189, 2017
20 2017 A programmable 34 nW/channel sub-threshold signal band power extractor on a body sensor node SoC AM Klinefelter, Y Zhang, B Otis, BH Calhoun
IEEE Transactions on Circuits and Systems II: Express Briefs 59 (12), 937-941, 2012
17 2012 A fine-grained GALS SoC with pausible adaptive clocking in 16 nm FinFET M Fojtik, B Keller, A Klinefelter, N Pinckney, SG Tell, B Zimmer, T Raja, ...
2019 25th IEEE International Symposium on Asynchronous Circuits and Systems …, 2019
15 2019 Error-energy analysis of hardware logarithmic approximation methods for low power applications A Klinefelter, J Ryan, J Tschanz, BH Calhoun
2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2361-2364, 2015
15 2015 A 0.11 pj/op, 0.32-128 tops, scalable multi-chip-module-based deep neural network accelerator designed with A high-productivity vlsi methodology R Venkatesan, YS Shao, B Zimmer, J Clemons, M Fojtik, N Jiang, B Keller, ...
2019 IEEE Hot Chips 31 Symposium (HCS), 1-24, 2019
12 2019 Simba: scaling deep-learning inference with chiplet-based architecture YS Shao, J Cemons, R Venkatesan, B Zimmer, M Fojtik, N Jiang, B Keller, ...
Communications of the ACM 64 (6), 107-116, 2021
10 2021 Verifying High-Level Latency-Insensitive Designs with Formal Model Checking S Dai, A Klinefelter, H Ren, R Venkatesan, B Keller, N Pinckney, ...
arXiv preprint arXiv:2102.06326, 2021
3 2021 Ultra low power sensing platform with multimodal radios BH Calhoun, Y Shakhsheer, Y Zhang, A Klinefelter, DD Wentzloff, ...
US Patent 10,340,972, 2019
3 2019 SE2: Going Remote: Challenges and Opportunities to Remote Learning, Work, and Collaboration A Klinefelter, H Liu, L Benini, Y Thonnart, K Bowman, K Wilcox, D Bol, ...
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 539-540, 2021
2 2021 How Software Can" Chip In" to the IC Design Process: A Multidisciplinary Approach May Attract New Talent and Accelerate Innovation A Klinefelter
IEEE Solid-State Circuits Magazine 12 (4), 48-55, 2020
2 2020 
Yanqing ZhangNVIDIAZweryfikowany adres z virginia.edu
