Cong (Callie) Hao
Cytowane przez
Cytowane przez
Fpga/dnn co-design: An efficient design methodology for 1ot intelligence on the edge
C Hao, X Zhang, Y Li, S Huang, J Xiong, K Rupnow, W Hwu, D Chen
2019 56th ACM/IEEE Design Automation Conference (DAC), 1-6, 2019
Cloud-DNN: An open framework for mapping DNN models to cloud FPGAs
Y Chen, J He, X Zhang, C Hao, D Chen
Proceedings of the 2019 ACM/SIGDA international symposium on field …, 2019
SkyNet: a hardware-efficient method for object detection and tracking on embedded systems
X Zhang, H Lu, C Hao, J Li, B Cheng, Y Li, K Rupnow, J Xiong, T Huang, ...
Proceedings of Machine Learning and Systems 2, 216-229, 2020
AutoDNNchip: An automated dnn chip predictor and builder for both FPGAs and ASICs
P Xu, X Zhang, C Hao, Y Zhao, Y Zhang, Y Wang, C Li, Z Guan, D Chen, ...
Proceedings of the 2020 ACM/SIGDA International Symposium on Field …, 2020
Edd: Efficient differentiable dnn architecture and implementation co-search for embedded ai solutions
Y Li, C Hao, X Zhang, X Liu, Y Chen, J Xiong, W Hwu, D Chen
2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020
Adversarial graph augmentation to improve graph contrastive learning
S Suresh, P Li, C Hao, J Neville
Advances in Neural Information Processing Systems 34, 15920-15933, 2021
Improving the generalization ability of deep neural networks for cross-domain visual recognition
J Zheng, C Lu, C Hao, D Chen, D Guo
IEEE Transactions on Cognitive and Developmental Systems 13 (3), 607-620, 2020
T-DLA: An open-source deep learning accelerator for ternarized DNN models on embedded FPGA
Y Chen, K Zhang, C Gong, C Hao, X Zhang, T Li, D Chen
2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 13-18, 2019
VecQ: Minimal loss DNN model compression with vectorized weight quantization
C Gong, Y Chen, Y Lu, T Li, C Hao, D Chen
IEEE Transactions on Computers 70 (5), 696-710, 2020
IRONMAN GNN-assisted Design Space Exploration in High-Level Synthesis via Reinforcement Learning
N Wu, Y Xie, C Hao
Proceedings of the 2021 on Great Lakes Symposium on VLSI, 39-44, 2021
NAIS: Neural architecture and implementation search and its applications in autonomous driving
C Hao, Y Chen, X Liu, A Sarwari, D Sew, A Dhar, B Wu, D Fu, J Xiong, ...
2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019
Skynet: A champion model for dac-sdc on low power object detection
X Zhang, C Hao, H Lu, J Li, Y Li, Y Fan, K Rupnow, J Xiong, T Huang, ...
arXiv preprint arXiv:1906.10327, 2019
Enabling design methodologies and future trends for edge AI: specialization and codesign
C Hao, J Dotzel, J Xiong, L Benini, Z Zhang, D Chen
IEEE Design & Test 38 (4), 7-26, 2021
Deep neural network model and FPGA accelerator co-design: Opportunities and challenges
C Hao, D Chen
2018 14th IEEE International Conference on Solid-State and Integrated …, 2018
Triangle counting and truss decomposition using FPGA
S Huang, M El-Hadedy, C Hao, Q Li, VS Mailthody, K Date, J Xiong, ...
2018 IEEE high performance extreme computing conference (HPEC), 1-7, 2018
Software/Hardware Co-design for Multi-modal Multi-task Learning in Autonomous Systems
C Hao, D Chen
2021 IEEE 3rd International Conference on Artificial Intelligence Circuits …, 2021
A hybrid GPU+ FPGA system design for autonomous driving cars
C Hao, A Sarwari, Z Jin, H Abu-Haimed, D Sew, Y Li, X Liu, B Wu, D Fu, ...
2019 IEEE International Workshop on Signal Processing Systems (SiPS), 121-126, 2019
On-FPGA training with ultra memory reduction: A low-precision tensor method
K Zhang, C Hawkins, X Zhang, C Hao, Z Zhang
arXiv preprint arXiv:2104.03420, 2021
µl2q: An ultra-low loss quantization method for DNN compression
C Gong, T Li, Y Lu, C Hao, X Zhang, D Chen, Y Chen
2019 International Joint Conference on Neural Networks (IJCNN), 1-8, 2019
Scalehls: Scalable high-level synthesis through mlir
H Ye, C Hao, J Cheng, H Jeong, J Huang, S Neuendorffer, D Chen
arXiv preprint arXiv:2107.11673, 2021
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