| A survey on fault injection methods of digital integrated circuits M Eslami, B Ghavami, M Raji, A Mahani Integration 71, 154-163, 2020 | 50 | 2020 |
| Reusing verification assertions as security checkers for hardware trojan detection M Eslami, T Ghasempouri, S Pagliarini 2022 23rd International Symposium on Quality Electronic Design (ISQED), 1-6, 2022 | 7 | 2022 |
| Benchmarking Advanced Security Closure of Physical Layouts: ISPD 2023 Contest M Eslami, J Knechtel, O Sinanoglu, R Karri, S Pagliarini Proceedings of the 2023 International Symposium on Physical Design, 256-264, 2023 | 1 | 2023 |
| SCARF: Securing Chips with a Robust Framework against Fabrication-time Hardware Trojans M Eslami, T Ghasempouri, S Pagliarini arXiv preprint arXiv:2402.12162, 2024 | | 2024 |
| SALSy: Security-Aware Layout Synthesis M Eslami, T Perez, S Pagliarini arXiv preprint arXiv:2308.06201, 2023 | | 2023 |
| Accelerating the Soft Error Rate of Digital Circuits using a Probability Propagation Approach on Xilinx Spartan6 FPGA M Eslami, B Ghavami, M Raji, A Mahani 26th Iranian Conference on Electrical Engineering (ICEE’ 18), 2018 | | 2018 |
| Designing a Novel Low Power Content Addressable Memory (CAM) using the Parity Bit M Eslami, F Yazdanpanah The 2nd International Conference on Information and Communication Technology, 2016 | | 2016 |
Samuel PagliariniCarnegie Mellon University / Tallinn University of TechnologyZweryfikowany adres z cmu.edu
