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Chien-Heng Wong
Chien-Heng Wong
Zweryfikowany adres z ucla.edu
Tytuł
Cytowane przez
Cytowane przez
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A 16-Gb/s 14.7-mW tri-band cognitive serial link transmitter with forwarded clock to enable PAM-16/256-QAM and channel response detection
Y Du, WH Cho, PT Huang, Y Li, CH Wong, J Du, Y Kim, B Hu, L Du, C Liu, ...
IEEE Journal of Solid-State Circuits 52 (4), 1111-1122, 2016
482016
10.2 A 38mW 40Gb/s 4-lane tri-band PAM-4/16-QAM transceiver in 28nm CMOS for high-speed Memory interface
WH Cho, Y Li, Y Du, CH Wong, J Du, PT Huang, SJ Lee, HN Chen, ...
2016 IEEE International Solid-State Circuits Conference (ISSCC), 184-185, 2016
252016
Digital PLL for phase noise cancellation in ring oscillator-based I/Q receivers
ZZ Chen, Y Li, YC Kuan, B Hu, CH Wong, MCF Chang
2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits), 1-2, 2016
162016
A novel fully synthesizable all-digital RF transmitter for IoT applications
Y Li, K Dhwaj, CH Wong, Y Du, L Du, Y Tang, Y Shi, T Itoh, MCF Chang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
102017
A 6-GHz self-oscillating spread-spectrum clock generator
CH Wong, TC Lee
IEEE Transactions on Circuits and Systems I: Regular Papers 60 (5), 1264-1273, 2013
102013
A fully integrated 28nm CMOS dual source adaptive thermoelectric and RF energy harvesting circuit with 110mv startup voltage
YW Tang, CH Wong, Y Du, L Du, Y Li, MCF Chang
2018 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2018
82018
A 2-GS/s 8-bit ADC featuring virtual-ground sampling interleaved architecture in 28-nm CMOS
XS Wang, X Jin, J Du, Y Li, Y Du, CH Wong, YC Kuan, CH Chan, ...
IEEE Transactions on Circuits and Systems II: Express Briefs 65 (11), 1534-1538, 2017
82017
DPLL for phase noise cancellation in ring oscillator-based quadrature receivers
ZZ Chen, YC Kuan, Y Li, B Hu, CH Wong, MCF Chang
IEEE Journal of Solid-State Circuits 52 (4), 1134-1143, 2017
82017
A 200-MS/s Phase-Detector-Based Comparator With 400uVrms Noise
CY Lin, CH Wong, CH Hsu, YH Wei, TC Lee
IEEE Transactions on Circuits and Systems II: Express Briefs 63 (9), 813-817, 2016
72016
An 8.8-GS/s 8b time-interleaved SAR ADC with 50-dB SFDR using complementary dual-loop-assisted buffers in 28nm CMOS
XS Wang, CH Chan, J Du, CH Wong, Y Li, Y Du, YC Kuan, B Hu, ...
2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 88-91, 2018
42018
A 2.2 GHz SRAM with high temperature variation immunity for deep learning application under 28nm
CC Liu, YH Wang, Y Li, CH Wong, TP Chou, YK Chen, MCF Chang
Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016
42016
A compact single-ended dual-band receiver with crosstalk and ISI reductions for high-density I/O interfaces
J Du, J Zhou, XS Wang, CH Wong, HN Chen, CP Jou, MCF Chang
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 231-234, 2019
32019
0.75 V 2.6 GHz digital bang–bang PLL with dynamic double‐tail phase detector and supply‐noise‐tolerant gm‐controlled DCO
CH Wong, Y Li, J Du, X Wang, MCF Chang
Electronics Letters 54 (4), 198-200, 2018
22018
A 7.5-mW 10-Gb/s 16-QAM wireline transceiver with carrier synchronization and threshold calibration for mobile inter-chip communications in 16-nm FinFET
J Du, CH Wong, YH Tu, WH Cho, Y Li, Y Du, PT Huang, SJ Lee, ...
Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip …, 2019
2019
DPLL and Energy Harvesting Circuit for Low-Power and Miniaturized System Applications
CH Wong
UCLA, 2018
2018
Multiband Radio Frequency Interconnect (MRFI) Technology For Next Generation Mobile/Airborne Computing Systems
MCF Chang, WH Cho, J Du, Y Du, SJ Lee, Y Li, CH Wong, ...
2017
自我振盪式展頻時脈產生器的設計與分析
CH Wong
2011
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