Xiao Cao
Xiao Cao
Electrical and computing engineering, Virginia Tech
Zweryfikowany adres z vt.edu
Cytowane przez
Cytowane przez
Characterization of lead-free solder and sintered nano-silver die-attach layers using thermal impedance
X Cao, T Wang, KDT Ngo, GQ Lu
Components, Packaging and Manufacturing Technology, IEEE Transactions on 1 …, 2011
Transient thermal performance of IGBT power modules attached by low-temperature sintered nanosilver
G Chen, D Han, YH Mei, X Cao, T Wang, X Chen, GQ Lu
IEEE Transactions on Device and Materials Reliability 12 (1), 124-132, 2011
Planar power module with low thermal impedance and low thermomechanical stress
X Cao, GQ Lu, KDT Ngo
IEEE Transactions on Components, Packaging and Manufacturing Technology 2 (8 …, 2012
Transient thermal impedance measurements on low-temperature-sintered nanoscale silver joints
Y Mei, T Wang, X Cao, G Chen, GQ Lu, X Chen
Journal of electronic materials 41 (11), 3152-3160, 2012
Parametric Study of Joint Height for a Medium-Voltage Planar Package
X Cao, T Wang, KDT Ngo, GQ Lu
Components and Packaging Technologies, IEEE Transactions on 33 (3), 553-562, 2010
Thermal design of power module to minimize peak transient temperature
X Cao, KDT Ngo, GQ Lu
Electronic Packaging Technology & High Density Packaging, 2009. ICEPT-HDP'09 …, 2009
Height Optimization for a Medium-Voltage Planar Package
X Cao, T Wang, KDT Ngo, GQ Lu
Applied Power Electronics Conference and Exposition, 2009. APEC 2009. Twenty …, 2009
Fast response control of stepping inductance voltage regulator module
X Cao, R Oruganti
2005 IEEE 36th Power Electronics Specialists Conference, 382-388, 2005
Development of a double-side cooled power module joined by low-temperature sintering of nanosilver paste for electric vehicles
X Cao, T Wang, Z Tan, K Ngo, S Luo, GQ Lu
IMAPS’s 2nd Advanced Technology Workshop on Automotive Microelec. and Packaging, 2010
Boundary-dependent circuit model for the transient behavior of a thermal stack in power modules
X Cao, GQ Lu, K Ngo
2011 IEEE Energy Conversion Congress and Exposition, 1853-1860, 2011
Optimization of bonding geometry for a planar power module to minimize thermal impedance and thermo-mechanical stress
X Cao
Virginia Tech, 2011
Characterization of Lead-Free Solder and Sintered Nano-Silver Die-Attach Layers Using Thermal Impedance.......................
X Cao, T Wang, KDT Ngo, GQ Lu, G Sharma, A Kumar, VS Rao, SW Ho, ...
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