| An open-source scalable thermal and power controller for HPC processors G Bambini, R Balas, C Conficoni, A Tilli, L Benini, S Benatti, A Bartolini 2020 IEEE 38th International Conference on Computer Design (ICCD), 364-367, 2020 | 7 | 2020 |
| ControlPULP: A RISC-V Power Controller for HPC Processors with Parallel Control-Law Computation Acceleration A Ottaviano, R Balas, G Bambini, C Bonfanti, S Benatti, D Rossi, L Benini, ... Embedded Computer Systems: Architectures, Modeling, and Simulation: 22nd …, 2022 | 4 | 2022 |
| ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation A Ottaviano, R Balas, G Bambini, A Del Vecchio, M Ciani, D Rossi, ... International Journal of Parallel Programming, 1-31, 2024 | 2 | 2024 |
| Modeling the Thermal and Power Control Subsystem in HPC Processors G Bambini, C Conficoni, A Tilli, L Benini, A Bartolini 2022 IEEE Conference on Control Technology and Applications (CCTA), 397-402, 2022 | 1 | 2022 |
Alessandro OttavianoPhD student, ETH ZurichVerified email at iis.ee.ethz.ch
