Iwona Grobelna
Title
Cited by
Cited by
Year
Design and Verification of Real-Life Processes With Application of Petri Nets
I Grobelna, R Wisniewski, M Grobelny, M Wisniewska
IEEE Transactions on Systems, Man, and Cybernetics: Systems 47 (11), 2856 - 2869, 2017
482017
Formal verification of embedded logic controller specification with computer deduction in temporal logic
I Grobelna
Przeglad Elektrotechniczny 87 (12a), 47-50, 2011
362011
Model checking of UML activity diagrams in logic controllers design
I Grobelna, M Grobelny, M Adamski
Proceedings of the Ninth International Conference on Dependability and …, 2014
282014
Petri Nets and activity diagrams in logic controller specification-transformation and verification
I Grobelna, M Grobelny, M Adamski
Proceedings of the 17th International Conference Mixed Design of Integrated …, 2010
272010
Hardware behavioural modelling, verification and synthesis with UML 2.x activity diagrams
M Grobelny, I Grobelna, M Adamski
Proceedings of 11th IFAC/IEEE International Conference on Programmable …, 2012
212012
Decomposition, validation and documentation of control process specification in form of a Petri net
I Grobelna, M Wiśniewska, R Wiśniewski, M Grobelny, P Mróz
2014 7th International Conference on Human System Interactions (HSI), 232-237, 2014
192014
Model checking of control interpreted Petri nets
I Grobelna, M Adamski
Proceedings of the 18th International Conference Mixed Design of Integrated …, 2011
172011
Deadlock detection in Petri nets: one trace for one deadlock?
A Karatkevich, I Grobelna
2014 7th International Conference on Human System Interactions (HSI), 227-231, 2014
112014
Design of Multi-Context Reconfigurable Logic Controllers Implemented in FPGA Devices Oriented for Further Partial Reconfiguration
R Wisniewski, I Grobelna
Journal of Circuits, Systems and Computers 27 (06), 1850086, 2018
102018
Formal verification of logic controller specification by means of model checking
I Grobelna
University of Zielona Góra Press, 2013
102013
Formal verification of logic controller specification using NuSMV model checker
I Grobelna
X International PhD Workshop OWD. Conference Archives PTETiS 25, 459-464, 2008
92008
Model checking of reconfigurable FPGA modules specified by Petri nets
I Grobelna
Journal of Systems Architecture 89, 1-9, 2018
82018
Formalna analiza interpretowanych algorytmicznych maszyn stanów ASM z wykorzystaniem narzędzia model checker
I Grobelna
Metody Informatyki Stosowanej, 107-124, 2008
72008
Logic controller design system supporting uml activity diagrams
M Grobelny, I Grobelna
2015 22nd International Conference Mixed Design of Integrated Circuits …, 2015
52015
UML Activity Diagrams in Requirements Specification of Logic Controllers
I Grobelna, M Grobelny
International Conference of Computational Methods in Sciences and …, 2015
52015
IoT security with one-time pad secure algorithm based on the double memory technique
R Wiśniewski, M Grobelny, I Grobelna, G Bazydło
AIP Conference Proceedings 1906 (1), 120009, 2017
42017
Partial reconfiguration of concurrent logic controllers implemented in FPGA devices
R Wiśniewski, I Grobelna, Ł Stefanowicz
AIP Conference Proceedings 1790 (1), 030003, 2016
42016
UML Activity Diagram Swimlanes in Logic Controller Design
M Grobelny, I Grobelna
International Conference of Computational Methods in Sciences and …, 2015
42015
Diagramy aktywności języka UML i sieci Petriego w systemach sterowania binarnego-od transformacji do weryfikacji
M Grobelny, I Grobelna
Pomiary Automatyka Kontrola 56, 1154-1158, 2010
42010
Gaps in design and tests of dependable embedded systems
I Grobelna, M Grobelny
Metody Informatyki Stosowanej, 45-51, 2010
42010
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