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Saied Hemati
Saied Hemati
Associate Professor, Electrical Engineering Department, Linköping University
Zweryfikowany adres z liu.se - Strona główna
Tytuł
Cytowane przez
Cytowane przez
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Majority-based tracking forecast memories for stochastic LDPC decoding
SS Tehrani, A Naderi, GA Kamendje, S Hemati, S Mannor, WJ Gross
IEEE Transactions on Signal Processing 58 (9), 4883-4896, 2010
1482010
Improving belief propagation on graphs with cycles
MR Yazdani, S Hemati, AH Banihashemi
IEEE Communications Letters 8 (1), 57-59, 2004
1242004
A 0.18μm Analog Min-Sum Iterative Decoder for a (32,8) Low-Density Parity-Check (LDPC) Code
S Hemati, AH Banihashemi, C Plett
Solid-State Circuits, IEEE Journal of 41 (11), 2531-2540, 2006
89*2006
Dynamics and performance analysis of analog iterative decoding for low-density parity-check (LDPC) codes
S Hemati, AH Banihashemi
IEEE Transactions on Communications 54 (1), 61-70, 2006
722006
Stochastic decoding of LDPC codes over GF (q)
G Sarkis, S Hemati, S Mannor, WJ Gross
IEEE transactions on communications 61 (3), 939-950, 2013
542013
A differential binary message-passing LDPC decoder
N Mobini, AH Banihashemi, S Hemati
IEEE transactions on communications 57 (9), 2518-2523, 2009
532009
Method and system for decoding
W Gross, S Hemati, S Mannor, A Naderi, F Leduc-Primeau
US Patent 8,677,227, 2014
502014
High-throughput energy-efficient LDPC decoders using differential binary message passing
K Cushon, S Hemati, C Leroux, S Mannor, WJ Gross
IEEE Transactions on Signal Processing 62 (3), 619-631, 2013
412013
Dithered belief propagation decoding
F Leduc-Primeau, S Hemati, S Mannor, WJ Gross
IEEE Transactions on Communications 60 (8), 2042-2047, 2012
382012
Iterative decoding in analog CMOS
S Hemati, AH Banihashemi
Proceedings of the 13th ACM Great Lakes symposium on VLSI, 15-20, 2003
362003
Method and system for decoding
W Gross, F Leduc-Primeau, S Hemati, S Mannor
US Patent 8,898,537, 2014
342014
A min-sum iterative decoder based on pulsewidth message encoding
K Cushon, C Leroux, S Hemati, S Mannor, WJ Gross
IEEE Transactions on Circuits and Systems II: Express Briefs 57 (11), 893-897, 2010
272010
A relaxed half-stochastic iterative decoder for LDPC codes
F Leduc-Primeau, S Hemati, WJ Gross, S Mannor
GLOBECOM 2009-2009 IEEE Global Telecommunications Conference, 1-6, 2009
262009
Adaptive multiset stochastic decoding of non-binary LDPC codes
A Ciobanu, S Hemati, WJ Gross
IEEE Transactions on Signal Processing 61 (16), 4100-4113, 2013
242013
Stochastic chase decoding of Reed-Solomon codes
C Leroux, S Hemati, S Mannor, WJ Gross
IEEE Communications Letters 14 (9), 863-865, 2010
212010
Comparison between continuous-time asynchronous and discrete-time synchronous iterative decoding
S Hemati, AH Banihashemi
IEEE Global Telecommunications Conference, 2004. GLOBECOM'04. 1, 356-360, 2004
202004
Full CMOS min-sum analog iterative decoder
S Hemati, A Banihashemi
202003
A relaxed min-sum LDPC decoder with simplified check nodes
S Hemati, F Leduc-Primeau, WJ Gross
IEEE Communications Letters 20 (3), 422-425, 2016
192016
Full CMOS min-sum analog iterative decoders
A Banihashemi, S Hemati
US Patent 7,769,798, 2010
142010
Energy-efficient gear-shift LDPC decoders
K Cushon, S Hemati, S Mannor, WJ Gross
2014 IEEE 25th International Conference on Application-Specific Systems …, 2014
132014
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