| Dynamic energy-accuracy trade-off using stochastic computing in deep neural networks K Kim, J Kim, J Yu, J Seo, J Lee, K Choi Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 230 | 2016 |
| Accurate and efficient stochastic computing hardware for convolutional neural networks J Yu, K Kim, J Lee, K Choi 2017 IEEE International Conference on Computer Design (ICCD), 105-112, 2017 | 62 | 2017 |
| Dance: Differentiable accelerator/network co-exploration K Choi, D Hong, H Yoon, J Yu, Y Kim, J Lee 2021 58th ACM/IEEE Design Automation Conference (DAC), 337-342, 2021 | 42 | 2021 |
| It's all in the teacher: Zero-shot quantization brought closer to the teacher K Choi, HY Lee, D Hong, J Yu, N Park, Y Kim, J Lee Proceedings of the IEEE/CVF conference on computer vision and pattern …, 2022 | 25 | 2022 |
| NN-LUT: Neural approximation of non-linear operations for efficient transformer inference J Yu, J Park, S Park, M Kim, S Lee, DH Lee, J Choi Proceedings of the 59th ACM/IEEE Design Automation Conference, 577-582, 2022 | 20 | 2022 |
| Acceleration of DNN backward propagation by selective computation of gradients G Lee, H Park, N Kim, J Yu, S Jo, K Choi Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 14 | 2019 |
| Efficient low-cost fault-localization and self-repairing radix-2 signed-digit adders applying the self-dual concept H Moradian, JA Lee, J Yu Journal of Signal Processing Systems 88, 297-309, 2017 | 6 | 2017 |
| A new approach to binarizing neural networks J Seo, J Yu, J Lee, K Choi 2016 International SoC Design Conference (ISOCC), 77-78, 2016 | 5 | 2016 |
| Pipe-BD: Pipelined parallel blockwise distillation H Jang, J Jung, J Song, J Yu, Y Kim, J Lee 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2023 | 2 | 2023 |
| Network recasting: A universal method for network architecture transformation J Yu, S Kang, K Choi Proceedings of the AAAI Conference on Artificial Intelligence 33 (01), 5701-5708, 2019 | 2 | 2019 |
| Hybrid spiking-stochastic deep neural network H Kim, J Yu, K Choi 2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 1-4, 2017 | 2 | 2017 |
| GeNAS: neural architecture search with better generalization J Jeong, J Yu, G Park, D Han, Y Yoo arXiv preprint arXiv:2305.08611, 2023 | 1 | 2023 |
| Enabling hard constraints in differentiable neural network and accelerator co-exploration D Hong, K Choi, HY Lee, J Yu, N Park, Y Kim, J Lee Proceedings of the 59th ACM/IEEE Design Automation Conference, 589-594, 2022 | 1 | 2022 |
| Rediscovery of the Effectiveness of Standard Convolution for Lightweight Face Detection. J Jeong, B Kim, J Yu, Y Yoo arXiv preprint arXiv:2204.01209, 2022 | 1 | 2022 |
| Tapered-Ratio Compression for Residual Network S Kang, J Yu, K Choi 2018 International SoC Design Conference (ISOCC), 72-73, 2018 | 1 | 2018 |
| ConCoDE: Hard-constrained Differentiable Co-Exploration Method for Neural Architectures and Hardware Accelerators D Hong, K Choi, HY Lee, J Yu, Y Kim, N Park, J Lee | | 2021 |
| DANCE: Differentiable accelerator/network co-exploration C Kanghyun, H Deokki, Y Hojae, Y Joonsang, K Youngsok, L Jinho arXiv preprint arXiv:2009.06237, 2020 | | 2020 |
| Hardware Friendly Neural Network Architecture and Accelerator Design for Efficient Inference 유준상 서울대학교 대학원, 2020 | | 2020 |
| 지식 증류법을 활용한 심층 신경망 학습방법 분석 유준상， 강성범， 최기영 대한전자공학회 학술대회, 693-696, 2018 | | 2018 |
| A new stochastic mutiplier for deep neural networks S Huh, J Yu, K Choi 2017 International SoC Design Conference (ISOCC), 46-47, 2017 | | 2017 |
Kiyoung ChoiSeoul National University, Department of Electrical and Computer EngineeringZweryfikowany adres z snu.ac.kr
