| CMOS standard cells characterization for defect based testing WA Pleskacz, D Kasprowicz, T Oleszczak, W Kuzmicz Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance …, 2001 | 46 | 2001 |
| A DRC-based algorithm for extraction of critical areas for opens in large VLSI circuits WA Pleskacz, CH Ouyang, W Maly IEEE transactions on computer-aided design of integrated circuits and …, 1999 | 39 | 1999 |
| Precision human body temperature measurement based on thermistor sensor P Narczyk, K Siwiec, WA Pleskacz 2016 IEEE 19th International Symposium on Design and Diagnostics of …, 2016 | 35 | 2016 |
| Defect-oriented fault simulation and test generation in digital circuits W Kuzmicz, W Pleskacz, J Raik, R Ubar Proceedings of the IEEE 2001. 2nd International Symposium on Quality …, 2001 | 32 | 2001 |
| CAD at the design-manufacturing interface HT Heineken, J Khare, W Maly, PK Nag, C Ouyang, WA Pleskacz Proceedings of the 34th annual Design Automation Conference, 321-326, 1997 | 29 | 1997 |
| Coupling a statistical process-device simulator with a circuit layout extractor for a realistic circuit simulation of VLSI circuits W Kuźmicz, W Denisiuk, J Gempel, Z Jaworski, M Niewczas, A Pfitzner, ... Simulation of Semiconductor Devices and Processes: Vol. 5, 37-40, 1993 | 29 | 1993 |
| Hierarchical defect-oriented fault simulation for digital circuits M Blyzniuk, T Cibakova, E Gramatova, W Kuzmicz, M Lobur, W Pleskacz, ... Proceedings IEEE European Test Workshop, 69-74, 2000 | 27 | 2000 |
| Digital CNN with optical and electronic processing S Jankowski, R Buczynski, A Wielgus, W Pleskacz, T Szoplik, ... Proc. European Conference on Circuit Theory and Design ECCTD'99, 1183-1186, 1999 | 23 | 1999 |
| Probabilistic analysis of CMOS physical defects in VLSI circuits for test coverage improvement M Blyzniuk, I Kazymyra, W Kuzmicz, WA Pleskacz, J Raik, R Ubar Microelectronics Reliability 41 (12), 2023-2040, 2001 | 19 | 2001 |
| A resistorless current reference source for 65 nm CMOS technology with low sensitivity to process, supply voltage and temperature variations M Łukaszewicz, T Borejko, WA Pleskacz 14th IEEE International Symposium on Design and Diagnostics of Electronic …, 2011 | 18 | 2011 |
| DefSim: A remote laboratory for studying physical defects in CMOS digital circuits WA Pleskacz, V Stopjakova, T Borejko, A Jutman IEEE Transactions on Industrial Electronics 55 (6), 2405-2415, 2008 | 18 | 2008 |
| Hierarchical test generation for combinational circuits with real defects coverage T Cibakova, M Fischerová, E Gramatova, W Kuzmicz, WA Pleskacz, ... Microelectronics Reliability 42 (7), 1141-1149, 2002 | 17 | 2002 |
| DOT: New deterministic defect-oriented ATPG tool J Raik, R Ubar, J Sudbrock, W Kuzmicz, W Pleskacz European Test Symposium (ETS'05), 96-101, 2005 | 16 | 2005 |
| A resistorless voltage reference source for 90 nm cmos technology with low sensitivity to process and temperature variations T Borejko, WA Pleskacz 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and …, 2008 | 15 | 2008 |
| Improvement of integrated circuit testing reliability by using the defect based approach D Kasprowicz, WA Pleskacz Microelectronics Reliability 43 (6), 945-953, 2003 | 15 | 2003 |
| Taste and smell senses estimation in patients with nasal polyps K Dzaman, WA Pleskacz, A Wałkanis, P Rapiejko, D Jurkiewicz Otolaryngologia Polska= The Polish Otolaryngology 61 (5), 831-837, 2007 | 14 | 2007 |
| Extraction of critical areas for opens in large VLSI circuits CH Ouyang, WA Pleskacz, W Maly Proceedings. 1996 IEEE International Symposium on Defect and Fault Tolerance …, 1996 | 14 | 1996 |
| LC-VCO design automation tool for nanometer CMOS technology K Siwiec, T Borejko, WA Pleskacz 2012 IEEE 15th International Symposium on Design and Diagnostics of …, 2012 | 13 | 2012 |
| Power dissipation in basic global clock distribution networks AL Sobczyk, AW Luczyk, WA Pleskacz 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems, 1-4, 2007 | 13 | 2007 |
| A CMOS system-on-chip for physiological parameters acquisition, processing and monitoring K Siwiec, K Marcinek, T Borejko, A Jarosz, J Kopański, E Kurjata-Pfitzner, ... 2015 22nd International Conference Mixed Design of Integrated Circuits …, 2015 | 12 | 2015 |
