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Mingyu Gao
Tytuł
Cytowane przez
Cytowane przez
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TETRIS: Scalable and Efficient Neural Network Acceleration with 3D Memory
M Gao, J Pu, X Yang, M Horowitz, C Kozyrakis
Proceedings of the Twenty-Second International Conference on Architectural …, 2017
5032017
Practical Near-Data Processing for In-memory Analytics Frameworks
M Gao, G Ayers, C Kozyrakis
2015 International Conference on Parallel Architecture and Compilation …, 2015
2942015
Energy-Efficient Abundant-Data Computing: The N3XT 1,000 x
MM Sabry Aly, M Gao, G Hills, CS Lee, G Pitner, MM Shulaker, TF Wu, ...
Computer 48 (12), 24-33, 2015
2382015
HRL: Efficient and Flexible Reconfigurable Logic for Near-Data Processing
M Gao, C Kozyrakis
2016 IEEE International Symposium on High Performance Computer Architecture …, 2016
2192016
GraphP: Reducing communication for PIM-based graph processing with efficient data partition
M Zhang, Y Zhuo, C Wang, M Gao, Y Wu, K Chen, C Kozyrakis, X Qian
2018 IEEE International Symposium on High Performance Computer Architecture …, 2018
1832018
Interstellar: Using Halide's Scheduling Language to Analyze DNN Accelerators
X Yang, M Gao, Q Liu, J Setter, J Pu, A Nayak, S Bell, K Cao, H Ha, ...
Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020
1322020
Improving the accuracy, scalability, and performance of graph neural networks with ROC
Z Jia, S Lin, M Gao, M Zaharia, A Aiken
Proceedings of Machine Learning and Systems (MLSys), 187-198, 2020
1242020
Tangram: Optimized Coarse-Grained Dataflow for Scalable NN Accelerators
M Gao, X Yang, J Pu, M Horowitz, C Kozyrakis
International Conference on Architectural Support for Programming Languages …, 2019
1082019
DNN Dataflow Choice Is Overrated
X Yang, M Gao, J Pu, A Nayak, Q Liu, SE Bell, JO Setter, K Cao, H Ha, ...
arXiv preprint arXiv:1809.04070, 2018
732018
Optimizing dnn computation with relaxed graph substitutions
Z Jia, J Thomas, T Warszawski, M Gao, M Zaharia, A Aiken
Proceedings of the 2nd Conference on Systems and Machine Learning (SysML’19), 2019
552019
Reconfigurable logic architecture
M Gao, H Zheng, KT Malladi, R Brennan
US Patent 9,577,644, 2017
352017
DRAF: A Low-Power DRAM-Based Reconfigurable Acceleration Fabric
M Gao, C Delimitrou, D Niu, KT Malladi, H Zheng, B Brennan, C Kozyrakis
Proceedings of the 43rd International Symposium on Computer Architecture …, 2016
322016
PET: Optimizing Tensor Programs with Partially Equivalent Transformations and Automated Corrections
H Wang, J Zhai, M Gao, Z Ma, S Tang, L Zheng, Y Li, K Rong, Y Chen, ...
15th USENIX Symposium on Operating Systems Design and Implementation (OSDI …, 2021
212021
PipeZK: Accelerating Zero-Knowledge Proof with a Pipelined Architecture
Y Zhang, S Wang, X Zhang, J Dong, X Mao, F Long, C Wang, D Zhou, ...
182021
ShEF: shielded enclaves for cloud FPGAs
M Zhao, M Gao, C Kozyrakis
Proceedings of the 27th ACM International Conference on Architectural …, 2022
162022
Special session paper 3D nanosystems enable embedded abundant-data computing
W Hwang, MMS Aly, YH Malviya, M Gao, TF Wu, C Kozyrakis, HSP Wong, ...
2017 International Conference on Hardware/Software Codesign and System …, 2017
15*2017
Space-multiplexing DRAM-based reconfigurable logic
M Gao, H Zheng, KT Malladi
US Patent 9,503,095, 2016
72016
FINGERS: Exploiting Fine-Grained Parallelism in Graph Mining Accelerators
Q Chen, B Tian, M Gao
Proceedings of the 27th ACM International Conference on Architectural …, 2022
52022
PPMLAC: high performance chipset architecture for secure multi-party computation
X Zhou, Z Xu, C Wang, M Gao
Proceedings of the 49th Annual International Symposium on Computer …, 2022
42022
DRAM-based reconfigurable logic
M Gao, H Zheng, KT Malladi
US Patent 9,954,533, 2018
42018
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