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Zhonghai Lu (鲁中海)
Tytuł
Cytowane przez
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Run-time partial reconfiguration speed investigation and architectural design space exploration
M Liu, W Kuehn, Z Lu, A Jantsch
2009 International Conference on Field Programmable Logic and Applications …, 2009
2192009
Cluster-based simulated annealing for mapping cores onto 2D mesh networks on chip
Z Lu, L Xia, A Jantsch
2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and …, 2008
1922008
An analytical latency model for networks-on-chip
AE Kiasari, Z Lu, A Jantsch
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 (1), 113-123, 2012
1372012
Addressing transient and permanent faults in NoC with efficient fault-tolerant deflection router
C Feng, Z Lu, A Jantsch, M Zhang, Z Xing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 (6 …, 2012
1302012
Three-phase time-aware energy minimization with DVFS and unrolling for chip multiprocessors
M Qiu, Z Ming, J Li, S Liu, B Wang, Z Lu
Journal of Systems Architecture 58 (10), 439-445, 2012
1202012
Analysis of worst-case delay bounds for best-effort communication in wormhole networks on chip
Y Qian, Z Lu, W Dou
2009 3rd ACM/IEEE International Symposium on Networks-on-Chip, 44-53, 2009
1172009
NNSE: Nostrum network-on-chip simulation environment
Z Lu, R Thid, M Millberg, E Nilsson, A Jantsch
Proc. of SSoCC, 2005
1112005
A reconfigurable fault-tolerant deflection routing algorithm based on reinforcement learning for network-on-chip
C Feng, Z Lu, A Jantsch, J Li, M Zhang
Proceedings of the Third International Workshop on Network on Chip …, 2010
1102010
Connection-oriented multicasting in wormhole-switched networks on chip
Z Lu, B Yin, A Jantsch
IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and …, 2006
1092006
Item-level indoor localization with passive UHF RFID based on tag interaction analysis
Z Zhang, Z Lu, V Saakian, X Qin, Q Chen, LR Zheng
IEEE Transactions on Industrial Electronics 61 (4), 2122-2135, 2013
1072013
Evaluation of on-chip networks using deflection routing
Z Lu, M Zhong, A Jantsch
Proceedings of the 16th ACM Great Lakes symposium on VLSI, 296-301, 2006
1032006
TDM virtual-circuit configuration for network-on-chip
Z Lu, A Jantsch
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16 (8 …, 2008
1002008
Analysis of worst-case delay bounds for on-chip packet-switching networks
Y Qian, Z Lu, W Dou
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010
832010
Scalability of network-on-chip communication architecture for 3-D meshes
AY Weldezion, M Grange, D Pamunuwa, Z Lu, A Jantsch, R Weerasekera, ...
2009 3rd ACM/IEEE International Symposium on Networks-on-Chip, 114-123, 2009
792009
Supporting distributed shared memory on multi-core network-on-chips using a dual microcoded controller
X Chen, Z Lu, A Jantsch, S Chen
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
702010
Feasibility analysis of messages for on-chip networks using wormhole routing
Z Lu, A Jantsch, I Sander
Proceedings of the 2005 Asia and South Pacific Design Automation Conference …, 2005
632005
FoN: Fault-on-Neighbor aware routing algorithm for Networks-on-Chip
C Feng, Z Lu, A Jantsch, J Li, M Zhang
23rd IEEE International SoC Conference, 441-446, 2010
602010
Mathematical formalisms for performance evaluation of networks-on-chip
AE Kiasari, A Jantsch, Z Lu
ACM Computing Surveys (CSUR) 45 (3), 1-41, 2013
542013
Power-efficient tree-based multicast support for networks-on-chip
W Hu, Z Lu, A Jantsch, H Liu
16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011), 363-368, 2011
532011
QoS scheduling for NoCs: Strict priority queueing versus weighted round robin
Y Qian, Z Lu, Q Dou
2010 IEEE International Conference on Computer Design, 52-59, 2010
532010
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