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Congyin Shi
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Highly power-efficient active-RC filters with wide bandwidth-range using low-gain push-pull opamps
L Ye, C Shi, H Liao, R Huang, Y Wang
IEEE Transactions on Circuits and Systems I: Regular Papers 60 (1), 95-107, 2012
952012
Unipolar -Based Resistive Change Memory Realized With Electrode Engineering
L Zhang, R Huang, M Zhu, S Qin, Y Kuang, D Gao, C Shi, Y Wang
IEEE electron device letters 31 (9), 966-968, 2010
782010
A single-chip CMOS UHF RFID reader transceiver for Chinese mobile applications
L Ye, H Liao, F Song, J Chen, C Li, J Zhao, R Liu, C Wang, C Shi, J Liu, ...
IEEE Journal of Solid-State Circuits 45 (7), 1316-1329, 2010
732010
Thwarting analog IC piracy via combinational locking
J Wang, C Shi, A Sanabria-Borbon, E Sánchez-Sinencio, J Hu
2017 IEEE International Test Conference (ITC), 1-10, 2017
612017
A Built-In Self-Test and In Situ Analog Circuit Optimization Platform
S Lee, C Shi, J Wang, A Sanabria, H Osman, J Hu, E Sánchez-Sinencio
IEEE Transactions on Circuits and Systems I: Regular Papers 65 (10), 3445-3458, 2018
402018
150–850 MHz high-linearity sine-wave synthesizer architecture based on FIR filter approach and SFDR optimization
C Shi, E Sánchez-Sinencio
IEEE Transactions on Circuits and Systems I: Regular Papers 62 (9), 2227-2237, 2015
382015
On-chip two-tone synthesizer based on a mixing-FIR architecture
C Shi, E Sánchez-Sinencio
IEEE Journal of Solid-State Circuits 52 (8), 2105-2116, 2017
222017
Built-in self optimization for variation resilience of analog filters
J Wang, C Shi, E Sanchez-Sinencio, J Hu
2015 IEEE Computer Society Annual Symposium on VLSI, 656-661, 2015
212015
A 2.3mA 240-to-500MHz 6th-order active-RC low-pass filter for ultra-wideband transceiver
L Ye, H Liao, C Shi, J Liu, R Huang
2010 IEEE Asian Solid-State Circuits Conference, 1-4, 2010
192010
A 4.2 mm 72 mW Multistandard Direct-Conversion DTV Tuner in 65 nm CMOS
L Chen, Y Wang, C Wang, J Wang, C Shi, X Weng, L Ye, J Liu, H Liao, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (1), 280-292, 2013
142013
A dual loop dual VCO CMOS PLL using a novel coarse tuning technique for DTV
C Shi, H Yang, H Xiao, J Liu, H Liao
2008 9th International Conference on Solid-State and Integrated-Circuit …, 2008
142008
Forming-less unipolar TaOx-based RRAM with large CC-independence range for high density memory applications
L Zhang, M Zhu, R Huang, D Gao, Y Kuang, C Shi, Y Wang
ECS Transactions 27 (1), 3, 2010
122010
A 31mA CMOS wideband BD-II B2&B3 mode receiver with 55dB gain dynamic range
C Wang, C Shi, L Ye, Z Hou, H Liao, R Huang
2010 IEEE Asian Solid-State Circuits Conference, 1-4, 2010
112010
Thermally stable TaOx-based resistive memory with TiN electrode for MLC application
L Zhang, R Huang, D Gao, Y Pan, S Qin, Z Yu, C Shi, Y Wang
2010 10th IEEE International Conference on Solid-State and Integrated …, 2010
92010
A 0.47mW 6th-order 20MHz active filter using highly power-efficient Opamp
L Ye, C Shi, H Liao, R Huang
2011 IEEE International Symposium of Circuits and Systems (ISCAS), 1640-1643, 2011
82011
A W-band divider-less cascading frequency synthesizer with push-push× 4 frequency multiplier and sampling PLL in 65nm CMOS
L Ye, Y Wang, C Shi, H Liao, R Huang
2012 IEEE/MTT-S International Microwave Symposium Digest, 1-3, 2012
72012
− 99dBc/Hz@ 10kHz 1MHz-step dual-loop integer-N PLL with anti-mislocking frequency calibration for global navigation satellite system receiver
C Shi, C Wang, L Ye, H Liao
2011 IEEE International Symposium of Circuits and Systems (ISCAS), 1876-1879, 2011
72011
A time-domain digital-intensive built-in tester for analog circuits
C Shi, S Lee, SS Aguilar, E Sánchez-Sinencio
Journal of Electronic Testing 34, 313-320, 2018
52018
An On-Chip Built-in Linearity Estimation Methodology and Hardware Implementation
C Shi, E Sánchez-Sinencio
IEEE Transactions on Circuits and Systems I: Regular Papers 66 (3), 897-908, 2019
32019
1mW 4-5GHz packaged VCO with bonding-to-ground inductors
C Shi, L Ye, J Liu
2010 10th IEEE International Conference on Solid-State and Integrated …, 2010
22010
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