| Design rule optimization of regular layout for leakage reduction in nanoscale design AR Subramaniam, R Singhal, CC Wang, Y Cao 2008 Asia and South Pacific Design Automation Conference, 474-479, 2008 | 123 | 2008 |
| Random variability modeling and its impact on scaled CMOS circuits Y Ye, S Gummalla, CC Wang, C Chakrabarti, Y Cao Journal of computational electronics 9, 108-113, 2010 | 83 | 2010 |
| Modeling of layout-dependent stress effect in CMOS design CC Wang, W Zhao, F Liu, M Chen, Y Cao Proceedings of the 2009 International Conference on Computer-Aided Design …, 2009 | 40 | 2009 |
| Simulation of random telegraph noise with 2-stage equivalent circuit Y Ye, CC Wang, Y Cao 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 709-713, 2010 | 31 | 2010 |
| The predictive technology model in the late silicon era and beyond Y Cao, A Balijepalli, S Sinha, CC Wang, W Wang, W Zhao Foundations and Trends® in Electronic Design Automation 3 (4), 305-401, 2010 | 15 | 2010 |
| Pathfinding for 22nm CMOS designs using predictive technology models X Li, W Zhao, Y Cao, Z Zhu, J Song, D Bang, CC Wang, SH Kang, J Wang, ... 2009 IEEE Custom Integrated Circuits Conference, 227-230, 2009 | 14 | 2009 |
| Compact modeling of stress effects in scaled CMOS CC Wang, W Zhao, F Liu, M Chen, Y Cao 2009 International Conference on Simulation of Semiconductor Processes and …, 2009 | 13 | 2009 |
| Compact modeling of Fe-FET and implications on variation-insensitive design CC Wang, Y Ye, Y Cao 2010 International Conference on Simulation of Semiconductor Processes and …, 2010 | 9 | 2010 |
| The potential of Fe-FET for robust design under variations: A compact modeling study CC Wang, Y Ye, Y Cao Microelectronics Journal 43 (11), 898-903, 2012 | 6 | 2012 |
| Workload-adaptive process tuning strategy for power-efficient multi-core processors J Lee, CC Wang, H Ghasemil, L Bircher, Y Cao, NS Kim Proceedings of the 16th ACM/IEEE international symposium on Low power …, 2010 | 6 | 2010 |
| Leakage reduction through optimization of regular layout parameters AR Subramaniam, R Singhal, CC Wang, Y Cao Microelectronics Journal 43 (1), 25-33, 2012 | 4 | 2012 |
| Intrinsic variability and reliability in nano-CMOS J Velamala, CC Wang, R Zheng, Y Ye, Y Cao ECS Transactions 35 (4), 353, 2011 | 2 | 2011 |
| Predictive Modeling for Extremely Scaled CMOS and Post Silicon Devices CC Wang Arizona State University, 2011 | 1 | 2011 |
| Intrinsic variability in nano-CMOS design and beyond Y Cao, CC Wang, Y Ye, S Gummalla, C Chakrabarti 2010 International Electron Devices Meeting, 17.5. 1-17.5. 1, 2010 | 1 | 2010 |
| Modeling and analysis of the nonrectangular gate effect for postlithography circuit simulation R Singal, A Balijepalli, A Subramaniam, CC Wang, F Liu, SR Nassif, ... IEEE transactions on very large scale integration (VLSI) systems 18 (4), 666-670, 2009 | 1 | 2009 |
