Wayne Luk
Wayne Luk
Professor of Computer Engineering, Imperial College London
Zweryfikowany adres z imperial.ac.uk
Tytuł
Cytowane przez
Cytowane przez
Rok
Reconfigurable computing: architectures and design methods
TJ Todman, GA Constantinides, SJE Wilton, O Mencer, W Luk, ...
IEE Proceedings-Computers and Digital Techniques 152 (2), 193-207, 2005
5592005
Reconfigurable computing: architectures and design methods
TJ Todman, GA Constantinides, SJE Wilton, O Mencer, W Luk, ...
IEE Proceedings-Computers and Digital Techniques 152 (2), 193-207, 2005
5592005
Compiling Occam into field-programmable gate arrays
I Page, W Luk
FPGAs, Oxford Workshop on Field Programmable Logic and Applications 15, 271-283, 1991
2861991
Gaussian random number generators
DB Thomas, W Luk, PHW Leong, JD Villasenor
ACM Computing Surveys (CSUR) 39 (4), 11-es, 2007
2682007
Accuracy-guaranteed bit-width optimization
DU Lee, AA Gaffar, RCC Cheung, O Mencer, W Luk, GA Constantinides
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
2552006
Pipeline vectorization
M Weinhardt, W Luk
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2001
2442001
A comparison of CPUs, GPUs, FPGAs, and massively parallel processor arrays for random number generation
DB Thomas, L Howes, W Luk
Proceedings of the ACM/SIGDA international symposium on Field programmable …, 2009
2212009
Axel: A heterogeneous cluster with FPGAs and GPUs
KH Tsoi, W Luk
Proceedings of the 18th annual ACM/SIGDA international symposium on Field …, 2010
2182010
Comparing three heuristic search methods for functional partitioning in hardware–software codesign
T Wiangtong, PYK Cheung, W Luk
Design Automation for Embedded Systems 6 (4), 425-449, 2002
2012002
A hardware Gaussian noise generator using the Box-Muller method and its error analysis
DU Lee, JD Villasenor, W Luk, PHW Leong
IEEE transactions on computers 55 (6), 659-671, 2006
1942006
Wordlength optimization for linear digital signal processing
GA Constantinides, PYK Cheung, W Luk
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2003
1892003
FP-BNN: Binarized neural network on FPGA
S Liang, S Yin, L Liu, W Luk, S Wei
Neurocomputing 275, 1072-1086, 2018
1752018
Compilation tools for run-time reconfigurable designs
W Luk, N Shirazi, PYK Cheung
Proceedings. The 5th Annual IEEE Symposium on Field-Programmable Custom …, 1997
1701997
Pipeline vectorization for reconfigurable systems
M Weinhardt, W Luk
Seventh Annual IEEE Symposium on Field-Programmable Custom Computing …, 1999
1671999
Maximum performance computing with dataflow engines
O Pell, O Mencer, KH Tsoi, W Luk
High-performance computing using FPGAs, 747-774, 2013
1622013
Unifying bit-width optimisation for fixed-point and floating-point designs
AA Gaffar, O Mencer, W Luk
12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines …, 2004
1472004
Performance comparison of graphics processors to reconfigurable logic: A case study
B Cope, PYK Cheung, W Luk, L Howes
IEEE Transactions on computers 59 (4), 433-448, 2010
1452010
Dynamic voltage scaling for commercial FPGAs
CT Chow, LSM Tsui, PHW Leong, W Luk, SJE Wilton
Proceedings. 2005 IEEE International Conference on Field-Programmable …, 2005
1442005
Enhancing relocatability of partial bitstreams for run-time reconfiguration
T Becker, W Luk, PYK Cheung
15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines …, 2007
1382007
The impact of pipelining on energy per operation in field-programmable gate arrays
SJE Wilton, SS Ang, W Luk
International Conference on Field Programmable Logic and Applications, 719-728, 2004
1382004
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