| Realization of self-repairing and evolvable hardware structures by means of implicit self-configuration JM Moreno, J Madrenas, J Cabestany, E Canto, R Kielbik, J Faura, ... Proceedings of the First NASA/DoD Workshop on Evolvable Hardware, 182-187, 1999 | 14 | 1999 |
| Realization of self-repairing and evolvable hardware structures by means of implicit self-configuration JM Moreno, J Madrenas, J Cabestany, E Canto, R Kielbik, J Faura, ... Proceedings of the First NASA/DoD Workshop on Evolvable Hardware, 182-187, 1999 | 14 | 1999 |
| ARUZ—Large-scale, massively parallel FPGA-based analyzer of real complex systems R Kiełbik, K Hałagan, W Zatorski, J Jung, J Ulański, A Napieralski, ... Computer Physics Communications 232, 22-34, 2018 | 10 | 2018 |
| Special purpose parallel computer for modelling supramolecular systems based on the dynamic lattice liquid model P Polanowski, J Jung, R Kielbik Computational Methods In Science And Technology 16 (2), 147-153, 2010 | 9 | 2010 |
| SDRAM controller for real time digital image processing systems T Szymański, R Kielbik, A Napieralski CAD Systems in Microelectronics, 2001. CADSM 2001. Proceedings of the 6th …, 2001 | 8 | 2001 |
| Recent research in VLSI, MEMS and power devices with practical application to the ITER and dream projects A Napieralski, C Maj, M Szermer, P Zajac, W Zabierowski, M Napieralska, ... Facta universitatis-series: Electronics and Energetics 27 (4), 561-588, 2014 | 6 | 2014 |
| Instructionless processor architecture using dynamically reconfigurable logic R Kiełbik, G Jabłoński, B Świercz, P Amrozik Proceedings of the 17th International Conference Mixed Design of Integrated …, 2010 | 6 | 2010 |
| Od algorytmu dynamicznej cieczy sieciowej do dedykowanego komputera równoległego P Polanowski, J Jung, R Kiełbik, A Napieralski, K Lichy Przegląd Elektrotechniczny 84 (11), 69-73, 2008 | 6 | 2008 |
| High-level partitioning of digital systems based on dynamically reconfigurable devices R Kielbik, JM Moreno, A Napieralski, T Szymanski Field-Programmable Logic and Applications: Reconfigurable Computing Is Going …, 2002 | 6 | 2002 |
| Efficient methods of resource management in re-programmable systems R Kiełbik Zeszyty Naukowe. Elektryka/Politechnika Łódzka, 35-40, 2006 | 4 | 2006 |
| FPGA-based Data Processing in the Neutron-Sensitive Beam Loss Monitoring System for the ESS Linac G Jabłoński, ID Kittelmann, W Jałmużna, R Kiełbik, W Cichalewski, ... 2019 MIXDES-26th International Conference" Mixed Design of Integrated …, 2019 | 2 | 2019 |
| Special state machine based on Dynamic Lattice Liquid model J Jung, P Polanowski, R Kiełbik International Journal of Engineering Science and Innovative Technology …, 2014 | 2 | 2014 |
| VPart: An automatic partitioning tool for dynamic reconfiguration. Abstract K Leoš, R Kielbik, M Rudolf, JM Moreno FPGA 2005-ACM/SIGDA Thirteenth International Symposium on Field-Programmable …, 0 | 2 | |
| Instructionless general purpose coarse-grained reconfigurable processor performance in encryption Z Mudza, R Kiełbik 2017 MIXDES-24th International Conference" Mixed Design of Integrated …, 2017 | 1 | 2017 |
| Od algorytmu dynamicznej cieczy sieciowej do dedykowanego komputera równoległego II–maszyna mDLL J Jung, R Kiełbik, K Rudnicki, P Polanowski Przegląd Elektrotechniczny 93, 162-170, 2017 | 1 | 2017 |
| Vpart: an automatic partitioning tool for dynamic reconfiguration L Kafka, R Kielbik, R Matousek, JM Moreno Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field …, 2005 | 1 | 2005 |
| Hardware implementation of programmable neural networks A Klepaczko, A Napieralski, R Kielbik, JM Moreno Proc. Nanotech 3, 115-118, 2003 | 1 | 2003 |
| Architecture of reprogrammable processor specified for video processing T Szymanski, R Kielbik, A Napieralski Experience of Designing and Applications of CAD Systems in Microelectronics …, 2001 | 1 | 2001 |
| A Capacitive 3-Axis MEMS Accelerometer for Medipost: A Portable System Dedicated to Monitoring Imbalance Disorders M Szermer, P Zając, P Amrozik, C Maj, M Jankowski, G Jabłoński, ... Sensors 21 (10), 3564, 2021 | | 2021 |
| Methodology of Firmware Development for ARUZ—An FPGA-Based HPC System R Kiełbik, K Rudnicki, Z Mudza, J Jung Electronics 9 (9), 1482, 2020 | | 2020 |
Andrzej NapieralskiProfessor, Lodz University of TechnologyVerified email at dmcs.pl
