NaviSoC: High-accuracy low-power GNSS SoC with an integrated application processor T Borejko, K Marcinek, K Siwiec, P Narczyk, A Borkowski, I Butryn, ... Sensors 20 (4), 1069, 2020 | 9 | 2020 |
Hybrid Cross Coupled Differential Pair and Colpitts Quadrature Digitally Controlled Oscillator Architecture I Butryn, K Siwiec, WA Pleskacz Electronics 10 (10), 1132, 2021 | 2 | 2021 |
Design of a wideband low noise amplifier for a FMCW synthetic aperture radar in 130 nm SiGe BiCMOS technology D Pietron, I Butryn, L Wiechowski, WA Pleskacz 2018 25th International Conference" Mixed Design of Integrated Circuits and …, 2018 | 2 | 2018 |
Integer-N phase locked loop for bluetooth receiver in CMOS 130 nm technology I Butryn, K Siwiec, J Kopański, WA Pleskacz 2016 IEEE 19th International Symposium on Design and Diagnostics of …, 2016 | 2 | 2016 |
Low power hybrid oscillator and its design method in nanometer CMOS technologies I Butryn The Institute of Microelectronics and Optoelectronics, 2023 | | 2023 |
Układ zintegowanego generatora o architekturze hybrydowej i niskim poborze mocy oraz metoda jego projektowania w nanometrowych technologiach CMOS I Butryn | | 2023 |
Metoda projektowania scalonego generatora drgan elektrycznych o architekturze hybrydowej I Butryn, K Siwiec, W Pleskacz 14th Electron Technology Conference, 2023 | | 2023 |
Erratum: Borejko, T., et al. NaviSoC: High-Accuracy Low-Power GNSS SoC with an Integrated Application Processor. Sensors 2020, 20, 1069 T Borejko, K Marcinek, K Siwiec, P Narczyk, A Borkowski, I Butryn, ... Sensors 20 (19), 5544, 2020 | | 2020 |
Ka Band Digitally Controlled Oscillator for FMCW Radar in 130 nm SiGe BiCMOS Technology I Butryn, L Wiechowski, D Pietron, WA Pleskacz 2018 25th International Conference" Mixed Design of Integrated Circuits and …, 2018 | | 2018 |
Phase locked loop model for Bluetooth receiver in Matlab/Simulink IŁ Butryn Instytut Mikroelektroniki i Optoelektroniki, 2013 | | 2013 |