| Logic synthesis for FPGA-based finite state machines A Barkalov, L Titarenko, M Kolopienczyk, K Mielcarek, G Bazydlo Springer International Publishing, 2016 | 52 | 2016 |
| Petri Net-Based Specification of Cyber-Physical Systems Oriented to Control Direct Matrix Converters With Space Vector Modulation R Wiśniewski, G Bazydło, PŁ Szcześniak, M Wojnakowski IEEE Access 7, 23407-23420, 2019 | 43 | 2019 |
| Demand side management through home area network systems G Bazydło, S Wermiński International Journal of Electrical Power & Energy Systems 97, 174-185, 2018 | 40 | 2018 |
| Dynamic Partial Reconfiguration of Concurrent Control Systems Implemented in FPGA Devices R Wiśniewski, G Bazydło, L Gomes, A Costa IEEE Transactions on Industrial Informatics 13 (4), 1734-1741, 2017 | 31 | 2017 |
| Translation UML diagrams into Verilog G Bazydlo, M Adamski, Ł Stefanowicz 2014 7th International Conference on Human System Interactions (HSI), 267-271, 2014 | 25 | 2014 |
| Analysis of safeness in a Petri net-based specification of the control part of cyber-physical systems M Wojnakowski, R Wiśniewski, G Bazydło, M Popławski International Journal of Applied Mathematics and Computer Science 31 (4), 2021 | 23 | 2021 |
| Low-cost FPGA hardware implementation of matrix converter switch control R Wiśniewski, G Bazydło, P Szcześniak IEEE Transactions on Circuits and Systems II: Express Briefs 66 (7), 1177-1181, 2018 | 21 | 2018 |
| Trusted and Secure Blockchain-Based Architecture for Internet-of-Medical-Things A Bhattacharjya, K Kozdrój, G Bazydło, R Wisniewski Electronics 11 (16), 2560, 2022 | 18 | 2022 |
| SVM algorithm oriented for implementation in a low-cost Xilinx FPGA R Wiśniewski, G Bazydło, P Szcześniak Integration 64, 163-172, 2019 | 17 | 2019 |
| Design and Verification of Cyber-Physical Systems Specified by Petri Nets—A Case Study of a Direct Matrix Converter R Wisniewski, G Bazydło, P Szcześniak, I Grobelna, M Wojnakowski Mathematics 7 (9), 812, 2019 | 16 | 2019 |
| Analysis and Design Automation of Cyber-Physical System with Hippo and IOPT-Tools R Wiśniewski, G Bazydło, L Gomes, A Costa, M Wojnakowski IECON 2019-45th Annual Conference of the IEEE Industrial Electronics Society …, 2019 | 14 | 2019 |
| Specification of UML 2.4 hierarchical state machine and its computer based implementation by means of Verilog G Bazydlo, M Adamski Przeglad Elektrotechniczny 87 (11), 145-149, 2011 | 12* | 2011 |
| Hippo-CPS: verification of boundedness, safeness and liveness of Petri net-based cyber-physical systems M Wojnakowski, M Popławski, R Wiśniewski, G Bazydło Doctoral Conference on Computing, Electrical and Industrial Systems, 74-82, 2022 | 10 | 2022 |
| From UML State Machine Diagram into FPGA Implementation G Bazydło, M Adamski, M Węgrzyn, AR Munoz IFAC Proceedings Volumes 46 (28), 298-303, 2013 | 10 | 2013 |
| Graphic specification of programs for reconfigurable logic controllers using unified modeling language G Bazydło University of Zielona Góra Press, 2012 | 8 | 2012 |
| Design of EMB-Based Mealy FSMs A Barkalov, L Titarenko, M Kolopienczyk, K Mielcarek, G Bazydlo, ... Logic Synthesis for FPGA-Based Finite State Machines, 193-237, 2016 | 7 | 2016 |
| From UML specification into FPGA implementation G Bazydlo, M Adamski, M Wegrzyn, AR Munoz Advances in Electrical and Electronic Engineering 12 (5), 452-458, 2014 | 7 | 2014 |
| Analysis of Control Part of Cyber-Physical Systems Specified by Interpreted Petri Nets M Wojnakowski, R Wiśniewski, M Popławski, G Bazydło 2022 IEEE International Conference on Systems, Man, and Cybernetics (SMC …, 2022 | 6 | 2022 |
| User awareness in IoT security. A survey of Polish users I Grobelna, M Grobelny, G Bazydło AIP Conference Proceedings 2040 (1), 2018 | 6 | 2018 |
| IoT security with one-time pad secure algorithm based on the double memory technique R Wiśniewski, M Grobelny, I Grobelna, G Bazydło AIP Conference Proceedings 1906 (1), 2017 | 6 | 2017 |
Remigiusz WiśniewskiUniversity of Zielona GóraZweryfikowany adres z issi.uz.zgora.pl
